Fix MRC NVS data reading issue#145
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myguitar merged 1 commit intoslimbootloader:masterfrom Apr 25, 2019
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An issue was reported on APL that MRC will start to do full training after 119 boot cycles. APL MRC training data contains two parts. One part will not change, and the other part will change for every boot. To avoid frequently erasing flash, a rolling method was applied to save this data into different slot for each boot. When all slots are full, the whole block will be reclaimed. However, some boundary condition was not handled properly which caused the NVS data cannot be located when the slot is close to the end of the block. This patch addressed this issue by: - Force the max slot number to be 8 aligned so that the map is always at byte boundary (1 bit for 1 slot in the slot map). - When all slots are marked with 0 (all slots are full), set default slot to be the last slot so that the last slot will be used to get the MRC NVS data. It fixed slimbootloader#146. Signed-off-by: Maurice Ma <maurice.ma@intel.com>
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An issue was reported on APL that MRC will start to do full training
after 119 boot cycles. APL MRC training data contains two parts. One
part will not change, and the other part will change for every boot.
To avoid frequently erasing flash, a rolling method was applied to
save this data into different slot for each boot. When all slots are
full, the whole block will be reclaimed. However, some boundary
condition was not handled properly which caused the NVS data cannot
be located when the slot is close to the end of the block.
This patch addressed this issue by:
at byte boundary (1 bit for 1 slot in the slot map).
slot to be the last slot so that the last slot will be used to get
the MRC NVS data.
It fixed #TBD.
Signed-off-by: Maurice Ma maurice.ma@intel.com