v1.1.0 #11
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v1.1.0 #11
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Fixes #1 Now buffers each row of pixels in SRAM if needed. DMA setup is similar to HSTX DVI driver
20MHz XCLK results in 30MHz PCLK, which the PIO can just barely handle (37.5MHz max). 25MHz XCLK results in 40MHz PCLK, which is too fast. Could also change PLL settings, but this is simpler.
Adds support for `axes` keyword in `transpose()`
Change XRP example 1 to transpose arrow buttons
Inherit from CV2_Display Properly implement imshow() and clear() Add gray8 and bgra8888 conversion functions to cv2_display.py Import from displays/__init__.py Move test code to new example
In anticipation of micropython/micropython#18458, which is slated for the v1.27.0 release.
Add RP2 DVI HSTX driver
There are some edge-case issues with having the DMAs automatically capture every frame from the camera. This change makes it default to non-continuous mode, but users can enable it if they really want.
Improve RP2 DVP PIO driver to work with faster cameras, like OV5640
Move display2 to Example 1 (can cause funky behavior in example 2) Fix camera using the correct buffer
No more dobule inheritance! New VideoCapture and VideoDisplay classes to more clsoely match standard OpenCV. New "abstract" base classes for camera and display drivers. All camera and display drivers now encapsulate an interface object for better expandability to other platforms. New utils subpackage with common color modes and memory helper functions. Update rv_init package after refactor. Update DVI exampels to no longer use private members. Add header comments files that were previously missing it. Add full file path to header comments.
…pixel. Fixes a regression with the HM01B0 driver, where the DMA is unable to transfer fast enough to keep up with the PIO when only 1 byte per transfer is performed. It's also just more efficient in general.
On RedBoard RP2350, the D0 pin ends up connecting to the HSTX connector. When an HDMI cable is plugged in, D0 connects to the CEC pin, which has the effect of dramatically increasing the capacitance on the D0 pin, resulting in a terrible eye pattern. Increasing the drive strength helps clean it up a lot. Also probably beneficial to do this to the PCLK pin, and on all boards when using 1-bit mode (highest PCLK frequency, same as MCLK pin) to help maintain good signal quality.
Too high seems to maybe cause oscillations or something. Hard to know for certain, because a scope probe changes the behavior.
Similar to the HM01B0, too high drive strength seems to result in degraded signal integrity, which is not visible with an oscilloscope due to the additional capacitance on the line. The default drive strength was set to the max (4x), which was causing bytes to sometimes be missed with the OV5640. Reducing to 2x seems to be much more stable now, and still sufficiently strong to get a clean eye pattern on the D0 pin while an HDMI cable is connected with the RP2350 RedBoard.
Further testing revealed 2x was still too much. 1x seems much more stable. Also fix erroneous extra bit getting set (not documented in datasheet, so probably shouldn't be changing it).
Driver encapsulation
More memory efficient, and matches dvi_rp2_hstx
…f grab() Ensures user doesn't need to call grab(), which is obscure
For parity with standard OpenCV method Also fix DVP_RP2_PIO by returning True at the end of grab()
Can also be done with the ST7789, not just DVI!
Helps ensure time-critical things are in SRAM Also confirm DVP driver's control block array is in SRAM
Only had 1 example left, which is really just an advanced version of hello_opencv. Could potentially bring it back, but it should probably not be specific to DVI.
Only affects DVP_RP2_PIO Add get_pin_number to utils/pins.py
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