iliasam
Follow
FPGA
An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…
An open source USB bootloader for FPGAs
0 - 32 MHz full spectrum and SDR Receiver with a very cheap FPGA board
Astra_S9_FPGA is a Powerful DevBoard from used Antminer S9 Control Board
Bluetooth PHY based on one-bit input and output
The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.
KiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS (archived)
Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom
Creation of a AXI Master and Yocto device driver for Zynq, using High Level Synthesis (HLS) techniques.
A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logi…
Open source Zynq timestamping implementation from Software Radio Systems (SRS)
Zynq 7z010 dev/main board based on components from Antminer S9 control board
A Time to Digital Converter designed for Xilinx 7-Series FPGAs
This repo contains both the uhd host driver and firmware for microphase antsdr devices.