Serial Peripheral Interface (SPI)

Logic signals

Pin	Name
CS	chip select
SCL/SCLK	serial clock
MOSI/DIN/SCI/SDI	master out, slave in
MISO/DC/RS	master in, slave out

CS (chip select)

Active-low chip select signal from master to enable communication with a specific slave device.

SCLK (serial clock)

Clock signal from master transitions for each serial data bit.

MOSI (master out, slave in)

Serial data from master, highest bit first.

MISO (master in, slave out)

Serial data from slave, highest bit first.