Plan: multiplexer backend abstraction implementation#401
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Plan: multiplexer backend abstraction implementation#401
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Break the design (PR #400) into 23 issues across 5 phases sized for AI-assisted implementation. Each issue lists outcome, files, steps as checkboxes, and acceptance criteria. Phase ordering (P1 → P2 → P3 → P4 → P5) and per-phase blockers (spike issues P3.0 / P4.0, deprecation window for P5) are explicit. Plan intentionally avoids over-specifying implementation details that should be made at coding time (KDL layout exact form, mutex implementation, etc.) per the slim Phase 4 design.
This was referenced May 10, 2026
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Closing this planning PR because the multiplexer implementation phases have been superseded by the merged implementation/docs PRs through zellij 0.44 team-session support (#444). |
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Summary
Implementation plan for the merged design (PR #400). Breaks Phase
1-5 into 23 issues sized for AI-assisted implementation. Lays out
phase ordering, blockers (spike issues, deprecation window), and
per-issue outcome / files / steps / acceptance.
Notable choices
shape, mutex strategy, exact swap-block boundaries) to the
implementer per the slim Phase 4 design
Test plan
(not too coarse, not too fine)
phase 1 only / etc.)