v1.10.1
·
6 commits
to main
since this release
Immutable
release. Only release title and notes can be modified.
- Fixed BH STALLWAIT wait_res bitfield width
- Relaxed overly strict alignment check in 1-row MOVD2B
- Added support for 1-row MOVB2D
- Added missing check for Disable_zero_compress bit set in packer
- Added support for loading non-identical lane values into LReg[14]
- Fixed bug in SFPSWAP argmax of negative values with identical bit representations
- Added WH support for SHFT_IMM mode of SFPSHFT2
- Added more QSR Tensix config registers
- Added support for dummy SFPCONFIG of LaneConfig to immediate 0 on QSR
- Added more QSR STALLWAIT support
- Allow D$ disable bit in QSR TRISC
- Fixed JSON specification of some WH NOC registers
- Added read/write of IERISC_RESET_PC register on WH
- Added common NIU tile registers to more tile types
- Fixed coordinate translation to obey NOC translation registers on WH
- Added placeholder code for configuring NOC translation with harvesting
- Added support for NOC atomics with 4B but not 16B alignment
- Fixed broadcast alignment in WH Ethernet base FW
- Removed unnecessary setup of ETH_HEARTBEAT_ADDR
- Removed TTSIM_ETH_FW_ROUTING=0 code paths
- Officially marked TTSIM_SEMIHOSTING=1 as deprecated
- Improved error message reporting
- Minor cleanup