MrBayes optimized with AVX512 and FMA
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Updated
Nov 16, 2017 - C
MrBayes optimized with AVX512 and FMA
Fast C header-only library for popcnt, pospopcnt, and set algebraic operations
Programs for producing as much heat as possible with AVX2 or AVX512 instructions
Agenium Scale vectorization library for CPUs and GPUs
Information about AVX-512 support on recent Intel processors
⚡️⚡️⚡️Blazing fast correlation functions on the CPU.
ips-arch-project is a project for the Computer Architecture course at AUCA.
Collection of optimized SIMD implementations for popular patterns
X86-64 bilateral instruction tokenizer implemented in C. Supports the following processor extensions: AES, AVX, AVX2, AVX512, FMA, MMX, SSE, SSE2, SSE3, SSE4, x87(FPU), VMX. In order to ease testing, a diassembler which transforms tokens into compilable assembly (for NASM compiler) has been implemented.
An implementation of Google's Encoded Polyline algorithm in AVX512 because why not. Perhaps the fastest and least portable polyline encoder out there?
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