Here are
76 public repositories
matching this topic...
A Chisel HDL template using Scala Bleep build tool
Updated
Aug 2, 2023
Scala
Sketching out an ILI9341 SPI driver, with a Zig testbench
Updated
Jun 12, 2024
Scala
Updated
Dec 3, 2017
Scala
A template Chisel project for the DE1SOC FPGA board
Updated
Feb 13, 2020
Scala
Collection of utilities to simplify FPGA accelerator design
Updated
Apr 12, 2019
Scala
Updated
Apr 25, 2024
Scala
5 Stage Pipeline CPU base on RV32I with a few fiexd-length SIMD instructions support
Updated
Mar 1, 2023
Scala
Updated
Dec 1, 2021
Scala
Template to start using Chryse
Updated
Jun 13, 2024
Scala
A Chisel Template with VERILATOR and NVBoard
Updated
Dec 23, 2023
Scala
Chisel Designer's Library
Updated
Dec 12, 2016
Scala
Wierton's OoO processor. Implement ISA MIPS32 Release 1 and 2, can run linux (under development).
Updated
Jun 3, 2022
Scala
RISC-V 1 and 5-stage CPUs Described in Chisel for Implementation in an Altera FPGA
Updated
Oct 15, 2017
Scala
Implementation of RISC-V Pipeline
Updated
Mar 2, 2023
Scala
Audio processing on a DE2-70 FPGA
Updated
May 20, 2023
Scala
An unpipelined 32-bit RISC-V CPU, written in Chisel.
Updated
Dec 29, 2022
Scala
Updated
Jun 9, 2024
Scala
Boilerplate for a full project with chisel and a DE0 Nano
Updated
Dec 30, 2019
Scala
A from scratch computer written with Chisel
Updated
Jan 10, 2023
Scala
OpenSoC Fabric - A Network-On-Chip Generator
Updated
Jan 16, 2024
Scala
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