A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
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Updated
May 10, 2020 - Verilog
A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
mirror of https://git.elphel.com/Elphel/eddr3
A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs
Opensource DDR3 Controller
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