Spectrum analyzer system using a 512-point FFT, in a Cyclone IV FPGA. Reads i2s audio from the codec and then does all FFT/VGA functions. Nios just reads the FFT result and draws the display bars. VGA frame buffer on-chip. VGA signals generated on-chip. See the included video files to watch it in action.

DE2简易电子计时器，使用VHDL语言开发，在DE2-115开发板上测试运行通过。该电子计时器具有四种工作模式：正常计时、从外部设置当前的小时数、从外部设置当前的分钟数、从外部设置当前的秒数，同时具有可逆的计时功能。

EDA技术与应用，DE2实验，DE2-115开发板实验，包含了实验1-4。

6位简易处理器的硬件设计，使用VHDL语言开发，在DE2-115开发板上运行通过。

a ping-pong-game by fpga developboard de2-115

Development of an FPGA-based graphics controller

A simple CPU created in Quartus Prime using VHDL for the DE2-115 FPGA Development Board.