Computer Architecture Projects
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Updated
Mar 24, 2024 - TeX
Computer Architecture Projects
32 bit floating point adder written in VHDL
Half Precision Floating Point Adder in Verilog
floating point adder
Assignments done in CSE306 course offered by CSE, BUET
Contains the project resources of the course CSE306. These were group projects.
verilog files
explore different implementations of adders and study their characteristics.
This is a repository containing all the simulations and reports of CSE-306 Computer Architecture Sessional.
Hardware designs modelled with verilog
CSE-306-Computer-Architecture Offline / Assignment on ALU, Floating Point Adder and 8 bit MIPS Datapath along with pipelining
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