SPI module for Nexys 4 Artix-7 FPGA Trainer Board
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Updated
May 4, 2020 - Verilog
SPI module for Nexys 4 Artix-7 FPGA Trainer Board
Digital Logic curriculum design - FPGA-based elevator controller
Designed and Implemented a low pass filter in Nexys 4 FPGA
NetFI-3: Netlist Fault Injection system - Version 3
64-Bits One-Time Pad on FPGA Board (Nexys 4 DDR Artix-7).
A FPGA Based Square Root Approximation Coprocessor
verilog modules
This project is to implement a combination lock on the FPGA board using VHDL language and finite state machine. There are some possible solutions are provided to address the problems including debounce, random number generation and combination check.
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