Image Processing Toolbox in Verilog using Basys3 FPGA
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Updated
Sep 19, 2023 - VHDL
Image Processing Toolbox in Verilog using Basys3 FPGA
NSCSCC2022龙芯杯个人赛,MIPS32,59MHz经典五级流水线架构,易于初学者阅读(计算机组成原理,自己动手写CPU)
Course project for Computer Design and Practice at HIT.
Proyecto desarrollado para la asignatura de Laboratorio de Electrónica Digital
A sprite clicker game, similar to that of the popular game "Osu". The game can be implented using a vanilla FPro system for the NEXYS A7 fpga board. The game utilitizes the PS2 protocol to allow for mouse input and the boards VGA adapter to display visuals on screen.
RISC processor done in verilog hdl for FPGA
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