Simplify VLSI (timing, power, noise, correlation, reliability) modeling and analysis with Characterization Description Format
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Updated
Feb 13, 2020 - C++
Simplify VLSI (timing, power, noise, correlation, reliability) modeling and analysis with Characterization Description Format
Courseworks of CS6165 VLSI Physical Design Automation, NTHU.
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Nonuniform Partitioning of Data Reuse Buffers on FPGAs
Gatery, a library for circuit design.
Template project for using gatery
Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
an implementation of the FAN ATPG algorithm in c++ and verilog.
A collection of Schematics, PCBs and VLSI work on various platforms
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