pcbLayout.matchAdapt collapses all PCB components onto the group origin

[zkasuran]

Setting pcbLayout={{ matchAdapt: true }} or matchAdapt on a board or group leaves every PCB component at (0,0), overlapping, instead of laying them out. The same board without the prop packs fine.

Group._getPcbLayoutMode() returns "match-adapt", but Group.doInitialPcbLayout() only dispatches grid, pack and flex, so no PCB layout runs. There is no PCB match-adapt implementation. Schematic match-adapt is unaffected.

Repro

<board width="40mm" height="40mm" routingDisabled pcbLayout={{ matchAdapt: true }}>
  <net name="V" />
  <net name="GND" />
  <resistor name="R1" resistance="1k" footprint="0805" connections={{ pin1: "net.V", pin2: "net.GND" }} />
  <resistor name="R2" resistance="1k" footprint="0805" connections={{ pin1: "net.V", pin2: "net.GND" }} />
  <capacitor name="C1" capacitance="100nF" footprint="0805" connections={{ pin1: "net.V", pin2: "net.GND" }} />
  <capacitor name="C2" capacitance="100nF" footprint="0805" connections={{ pin1: "net.V", pin2: "net.GND" }} />
</board>

After render, db.pcb_component.list() returns four components all centered at (0,0) and the circuit-json contains pcb_courtyard_overlap_error entries. Expected: the components laid out without overlap. Removing the prop packs them to four distinct positions with no overlap.

Suggested fix: dispatch match-adapt to the pack layout (the default PCB auto-layout) until a real PCB match-adapt exists.