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Releases: tylorsaling-source/SSOS-ESP32

SSOS ESP32 V2.0.1 - Reliable save on reused boards

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@tylorsaling-source tylorsaling-source released this 15 Sep 00:11
5a93c41

V2.0.1 fixes the install path where live inference passed but SAVE failed on reused NVS storage. The Windows proof now announces and initializes the 20 KiB settings region by default. Flash-only Windows, POSIX, and Termux installers expose an explicit initialization option; -KeepSettings opts out in the proof workflow.

Download and extract SSOS_ESP32-v2.0.1-packet-model-bridge-release.zip, install Python 3.10+, then run:

python -m pip install "esptool>=5.1" pyserial
.\scripts\validate-v2-windows.cmd

The command selects one compatible ESP32-S3, asks for confirmation, flashes and verifies four images, clears only NVS at 0x9000 / 0x5000, installs 72 coefficients, saves, and checks the outputs again after a hardware reset. Initialization discards saved settings/model rows. COM3 is refused. No firmware backup or dump is made.

Physical proof: the stock command from an extracted ZIP passed on controlled dirty storage and a clean-enough repeat. Each run matched 48/48 scores, returned OK saved, and advanced boot count 1 to 2 without resending rows. Maximum absolute error was 4.6875000014878765e-7 against 2e-5 tolerance. The preserved-settings control reproduced the SAVE failure and the new recovery hint.

See the complete run report, raw evidence, and independent audits and merged PR #20. All 11 host unit tests and repository checks passed. Windows PowerShell 5.1/native USB was physically tested; POSIX/Termux had host/dry-run checks. This proves hardware reset persistence, not USB power-unplug endurance.

The app and companions use Arduino-ESP32 3.3.5, the same 16 MB target and partition layout, with PSRAM disabled. The packet format, 72-coefficient Q10 representation, and 9-input/8-output math are unchanged. This ZIP contains the V2 firmware, host tools, worked model adapter, installers, and validation evidence. Other payloads retain their separate releases.

Source commit: 5a93c4116228606e39f5750c942751bc62eb5227.
ZIP SHA-256: 69cbde3ecfc145a60ea2dcc76fb8801b2080a339cd51b46b29c7a91dc9268854.
The external checksum file verifies the ZIP; its internal SHA256SUMS verifies 115 packaged files.

Fresh public-download verification passed: both original assets returned HTTP 200 without authentication, the ZIP and all 115 internal hashes matched, and the downloaded package's stock command passed another 48/48 scores, SAVE, and hardware-reset persistence at 2026-09-15 00:12:36 UTC. See the machine-readable download/physical audit and complete supplemental proof. Its separate public-proof checksum file covers those evidence assets. The main release ZIP was not changed after this test.

SSOS ESP32 V4.0.1 - Standalone Cluster 3-4-5 Checkpoint

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@tylorsaling-source tylorsaling-source released this 19 Aug 19:31
187d4ea

V4.0.1: standalone cluster 3–4–5 lineage

V4.0.1 is a separate release package for cluster-345-fresh. It does not contain the V4.0.0 checkpoint or learned state.

  • fresh weights with no parent checkpoint
  • independent master/worker weights, AdamW state, RNG and schedule
  • exact step-5,000 checkpoint after 5,120,000 presented tokens
  • 9.309362 tokens per parameter
  • training loss 3.468667 and held-out loss 3.488711
  • deterministic quality samples and machine-readable result
  • exact split-update gate with zero loss, gradient and updated-weight difference

V4.0.0 remains separately downloadable at its original tag with its original checkpoint and assets.

SSOS ESP32 V4.0.0 - Split-Language Training Checkpoint

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@tylorsaling-source tylorsaling-source released this 19 Aug 18:43
65c08c2

V4.0.0 capabilities

V4.0.0 publishes the first reproducible checkpoint for the custom 549,984-parameter SSOS split-language model.

  • 274,944 master-owned parameters and 275,040 worker-owned parameters
  • exact step-107,419 checkpoint with AdamW, RNG, corpus/tokenizer identity, and schedule
  • 54,998,528 presented tokens (100.00023 tokens per parameter)
  • best recorded held-out loss 2.991671
  • deterministic continuous-versus-split gate with zero loss, gradient, and updated-weight error
  • 9-D forward/backward/update transaction protocol
  • deterministic curriculum builders and cumulative-token continuation controls
  • checksum-pinned package and first-checkpoint evidence

The generated first-checkpoint samples are included as evidence. Continued training is expected to improve language quality while preserving this checkpoint as the reproducible starting milestone.

SSOS ESP32 V3.0.1 - Quark Interleaved Pipelines

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@tylorsaling-source tylorsaling-source released this 19 Aug 18:20
33c660a

SSOS ESP32 V3.0.1 — Quark interleaved pipelines

V3.0.1 adds an optional one-master/two-worker topology alongside the original two-board V3 pipeline.

New capabilities

  • Two independent 40 MHz SPI lanes
  • Four concurrent autoregressive contexts with separate model and KV-cache state
  • Stream IDs and per-stream sequence validation
  • Independent per-lane retry frames and checksum recovery
  • Three role-specific firmware applications and physically accepted prebuilt images
  • Exact two-lane wiring plus Windows and POSIX build/flash workflows
  • Machine-readable physical results and package-wide checksums

Accepted physical result

  • 96/96 exact oracle tokens
  • 87.927387 aggregate tokens/second
  • A second exact gate reached 96/96 at 87.871532 tokens/second
  • Checksum recovery successfully handled a lane-2 mismatch

The original accepted two-board topology remains included. Its five-run result is 240/240 exact tokens at a median 44.730763 aggregate tokens/second, a 2.438279x gain from two-context interleaving over the Paired Two-Board Non-Interleaved Baseline.

The downloadable ZIP contains source, pretrained model, exact prebuilt applications, wiring, build/flash scripts, physical evidence, licenses, and internally verified checksums.

SSOS ESP32 V3.0.0 - Two-Board Quark Pipeline

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@tylorsaling-source tylorsaling-source released this 19 Aug 11:00
7628b71

SSOS ESP32 V3.0.0: two-board Quark language pipeline

V3 packages one pretrained 465,504-parameter Quark-v2-0.5M causal-language model across two ESP32-S3-WROOM-1U N16R8 boards connected by 40 MHz SPI.

The master executes layers 0-1. The worker executes layers 2-3 and next-token selection. Two independent autoregressive contexts alternate so master and worker computation overlap.

Included

  • Exact physically tested master and worker application images
  • Full firmware source and pinned Q8 group-8 model
  • Five-signal plus shared-ground wiring guide
  • Windows and POSIX build and flash scripts
  • Original standalone and sequential-pair baselines
  • Result capture and fail-closed verification tools
  • Checksums, licenses, notices, and publication manifest

Accepted physical result

  • 240/240 expected tokens over five runs
  • 44.730763 aggregate tokens/second median
  • 2.421880x the 18.469438 tok/s one-board baseline
  • 2.438279x the 18.345216 tok/s original sequential-pair median
  • Worker reset/rejoin: 48/48 expected tokens, zero errors

Important compatibility boundary

V3 is a separate two-board application. It does not preserve or expose the V1/V2 packet console while running. Flashing replaces the selected boards' current applications, so preserve any existing firmware and learned state first.

The speed result is aggregate throughput from two independent interleaved contexts. It is not a claim of 2x lower latency for one dependent autoregressive text stream. Firmware transport counters include worker-compute wait time and are not pure SPI serialization measurements.

SSOS ESP32 V2.0.0 - Packet Model Bridge

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@tylorsaling-source tylorsaling-source released this 16 Aug 00:25

Packet-backed model execution bridge

V2.0.0 preserves the V1 packet bank and adds a replaceable 9-input/8-output execution head. Eight ordinary ssos.packet.v1 records hold signed-Q10 model rows; MLOAD validates them and reconstructs a volatile 72-weight cache, while MINFER executes it. The packet bank remains authoritative.

The release includes a worked basic_surv 72-weight head and Windows installer. Updating model packets after the initial firmware installation does not require reflashing firmware.

Validation status: compiled and host/artifact validated, including held-out and unseen-rollout reports. V2.0.0 has not been physically flashed. Do not interpret compilation or simulation as a hardware test.

SSOS ESP32 V1.0.0 - Core Packet Controller

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@tylorsaling-source tylorsaling-source released this 16 Aug 00:25

Frozen model-agnostic packet controller

V1.0.0 is the frozen SSOS packet-controller baseline. It contains the 32-slot ssos.packet.v1 bank, persistent packet state, live 9-D tensor, fused 9-to-8 matcher, host tools, guided flashing, and reproducible benchmark traces.

Validation status: physically tested on ESP32-S3-WROOM-1U N16R8 through the Windows path; the Termux path was separately tested by the project owner. The included matcher benchmarks are kernel examples, not an installed application model.

Read docs/FLASHING.md before writing a board. The supplied images are only for the stated 16 MB QIO board configuration with PSRAM disabled.