Releases: ultronstudio/pvkernel
Releases · ultronstudio/pvkernel
Release list
pvKernel 0.0.4 — Hardware Interrupts and Timer
[0.0.4] - 2026-08-01
Added
- A legacy dual 8259 PIC driver (
kernel::arch::x86_64::pic): IRQ vector
remapping to 32-47, per-line masking/unmasking, end-of-interrupt handling
(including the slave-then-master cascade order), and spurious IRQ7/IRQ15
detection via the in-service register. - A PIT channel 0 periodic timer driver (
kernel::arch::x86_64::pit),
configured for approximately 100 Hz, with an atomic tick counter and an
uptime helper. - IDT handlers for all 16 remapped IRQ vectors (32-47): a timer handler, two
spurious-IRQ handlers, and generic handlers for every other line that
pvKernel keeps masked in this release. - A boot-time verification that unmasks the timer IRQ, enables maskable
hardware interrupts, and confirms the tick counter advances before
continuing. - A distinction between fatal halting (
halt::halt_forever, used for panics
and fatal CPU exceptions) and an interrupt-enabled idle loop
(halt::idle_loop), which normal boot now ends in instead of halting
immediately. - QEMU
isa-debug-exitsupport (kernel::arch::x86_64::qemu, behind the new
qemu-testCargo feature) and a root runner--headless-testflag, so the
timer and expected-page-fault tests can run deterministically and exit
with a pass/fail status suitable for CI. - A
qemu-testsCI job running both headless tests on every pull request
and push tomain. - New documentation:
docs/architecture/hardware-interrupts.md,
docs/architecture/timer.md, and
docs/development/testing.md.
Changed
- The expected-page-fault test (
fault-testsfeature) now runs after the
timer verification instead of before it, so afault-testsbuild always
exercises PIC/PIT timer interrupts before its deliberate fault. - The root runner's window title is now
pvKernel 0.0.4. - The
qemu-testsCI job now builds each headless test binary in an
untimed step before running it, and raises the run timeout to 120
seconds, since GitHub-hosted runners have no/dev/kvmand fall back to
slower TCG emulation.
Out of scope for this milestone: APIC, keyboard input, any IRQ line other
than the timer, memory allocation, and scheduling.
Full diff: v0.0.2...v0.0.4
pvKernel 0.0.2 — CPU Exception Foundation
[0.0.2] - 2026-08-01
Added
- Modular kernel source layout (
arch,drivers,graphics,halt). - A kernel-owned Global Descriptor Table (GDT).
- A kernel-owned Task State Segment (TSS).
- A dedicated Interrupt Stack Table stack for double faults.
- A kernel-owned Interrupt Descriptor Table (IDT).
- Exception handlers for breakpoint, invalid opcode, general protection
fault, page fault (with CR2 diagnostics), and double fault. - A controlled
int3boot-time verification of the breakpoint handler. - An optional page-fault test behind the
fault-testsCargo feature. - GitHub Actions CI running
cargo fmt --all -- --checkandcargo build. - Project-specific contribution, code of conduct, architecture, roadmap,
dependency, build, and debugging documentation.
Changed
- Serial logging moved into a dedicated driver module with
kprint!/
kprintln!macros. - Kernel initialization order: interrupts disabled, then GDT/TSS, then IDT,
then framebuffer, then the controlled breakpoint test. - Added
spinas a kernel dependency for static, no_std-safe descriptor
table storage.
pvKernel 0.0.1 — First UEFI Boot
The first public development milestone of pvKernel.
Implemented
- UEFI boot
- x86_64 kernel entry point
- boot memory map access
- linear framebuffer access
- centered pvKernel boot logo
- serial port diagnostics
- panic handler
- CPU halt loop
Current limitations
pvKernel does not yet provide:
- kernel-owned exception handling
- memory allocation
- processes or scheduling
- user mode
- system calls
- filesystems
- device drivers
- networking
This release is an early development preview and is not suitable for
production use.