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Cleaned up the last necessary spelling mistakes in VPR so we can now add codespell to the CI. This will add spell-checking to the CI tests so when people merge code into VTR, we can ensure that there are no obvious spelling mistakes.

I have added a config file which contains which files should be ignored and what words can be ignored.

@github-actions github-actions bot added VPR VPR FPGA Placement & Routing Tool libarchfpga Library for handling FPGA Architecture descriptions lang-cpp C/C++ code infra Project Infrastructure labels Dec 8, 2025
Cleaned up the last necessary spelling mistakes in VPR so we can now add
codespell to the CI. This will add spell-checking to the CI tests so
when people merge code into VTR, we can ensure that there are no obvious
spelling mistakes.

I have added a config file which contains which files should be ignored
and what words can be ignored.
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@vaughnbetz vaughnbetz left a comment

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LGTM

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@amin1377 amin1377 left a comment

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Thanks, Alex!

@AlexandreSinger AlexandreSinger merged commit 896108b into verilog-to-routing:master Dec 8, 2025
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3 participants