vyges-drc

Geometric design-rule check: a laid-out GDS + a per-layer rule deck in, a list of violations out.

Vyges open EDA tools. Commercial-grade silicon sign-off capability, built on open standards and plain file formats — and meant to be accessible to everyone, not only teams who can license a six-figure tool. vyges-drc opens up DRC.

Stability: experimental (v0.1.2). The width and spacing checks are real and tested, but this is an early engine — see Current state for exactly what is and isn't covered. Treat it as an inner-loop checker, not tape-out sign-off.

Why this exists

A layout is only manufacturable if its geometry obeys the foundry's rules — minimum wire width, minimum spacing, enclosure, density. DRC proves that. It is the geometric sibling of LVS: LVS asks does the layout implement the schematic?, DRC asks does the layout obey the rules? Both are required to tape out, and both are pure geometry — exactly the deterministic, graph/geometry work an open Rust engine can own.

How this is solved today

In production, DRC is a commercial physical-verification tool (Calibre, Pegasus, …) — gated behind major licenses. The open options are Magic and KLayout — capable, but C++/Tcl/Ruby and awkward to embed. vyges-drc is a clean-room Rust engine on the same vyges-layout GDS/boolean kernel that vyges-lvs rides, so the physical-verification pair (DRC + LVS) is one toolset, one language, one install.

Describe the rules, not a script. A small whitespace rule deck (.drc) instead of a tool-specific rule language — readable, diffable, schema-checkable.

Use it

cargo build --release            # std-only beyond the vyges-layout kernel

vyges-drc check block.gds --rules sky130.drc            # -> violations report
vyges-drc check block.gds --rules sky130.drc --top block --json
vyges-drc check block.gds --rules sky130.drc --fail-on-violation   # exit 3 (CI gate)
vyges-drc fill  block.gds --rules sky130.drc -o filled.gds         # metal-fill generator
vyges-drc demo                                          # built-in layout with violations
# flags: --rules DECK · --top CELL · -o FILE · --json · --fail-on-violation · -h · -V

A rule deck keys on the GDS layer number; each rule takes its own arguments in DB units (# starts a comment):

# rule     layer  args
width      66     170             # min width on layer 66
space      68     140             # min spacing on layer 68
area       68     20000           # min polygon area (dbu²) on layer 68
density    68     20 70 100000    # coverage on 68 must be 20–70% per 100000-dbu window
connect    5      68              # layers 5 & 68 connect where they overlap (via/contact)
antenna    68     5  400          # per net: layer-68 area ≤ 400 × its layer-5 gate area
enclosure  68     66 40           # every layer-66 shape enclosed by layer-68 with ≥40 margin
fill       70     30 100000 600 400   # top layer 70 to 30% per window (600-fill, 400-gap)

The fill rule drives the fill generator (vyges-drc fill … -o out.gds), not the checker — the checker ignores it.

Current state (v0.1.2)

Working & tested: six rule classes plus a fill generator —

• width — a shape whose smaller dimension is below the layer minimum;
• spacing — two distinct same-layer shapes closer than the minimum (run-length on overlapping projections, Euclidean on corners; touching shapes treated as connected);
• area — a polygon below the layer's minimum area (dbu²);
• density — windowed metal coverage: each window-square tile (edge tiles clamped to the layer bbox) must stay within a min..max percent band, flagging the offending tile and its measured coverage;
• antenna — a per-net check: extract nets (union-find over shapes that overlap on the same layer, or on a connect-declared layer pair), then flag any net whose conductor-layer area exceeds max_ratio × its connected gate-layer area (process-antenna / plasma-damage protection). The one rule class that needs connectivity, not just per-layer geometry;
• enclosure — every inner-layer shape must sit inside an outer-layer shape with at least min margin on all four sides (e.g. metal must enclose a via); reports the worst margin, or "not enclosed" when no single outer contains it.

Plus the fill generator (vyges-drc fill): for each fill rule it tiles every window below the target with clearance-respecting fill shapes and writes a filled GDS — the fix paired with the density check.

GDS load + hierarchy flatten (via vyges-layout), text + --json reports, a --fail-on-violation CI exit code.

Depth reserved (honest):

• shapes are taken per input boundary, not pre-merged — a wide wire drawn as abutting rectangles, or two same-net touching shapes, are measured as drawn; proper DRC unions same-layer geometry first (a vyges-layout boolean OR) and measures the resulting polygons (this also means density can over-count where same-layer shapes overlap);
• non-Manhattan polygons fall back to their bounding box;
• spacing / density / antenna-connectivity are brute-force all-pairs (a spatial index is the scaling pass, as in vyges-extract's coupling grid);
• antenna is a single-conductor-layer ratio with a simple overlap-based connect model — not yet the cumulative per-metal-layer charge model or a diode-discharge credit, and a net with conductor but no gate is treated as not-applicable;
• enclosure takes outer shapes un-merged, so an inner enclosed only by the union of two abutting outer rects reports as under-enclosed;
• fill tiles the design bounding box (include a die/boundary layer for a sparse layout), places fill on the rule's layer at datatype 0 (a dedicated fill datatype is a follow-up), and reaches the size/gap geometric ceiling rather than exceeding it;
• layers are keyed by GDS number; a named-layer mapping is a follow-up.

Validation roadmap: correlate against KLayout / Magic golden DRC on open PDKs (sky130, gf180) — the same oracle-backed, golden-corpus discipline the rest of Loom uses.

Open core, certified fab decks

vyges-drc is open and contains no foundry-confidential data. The rule deck is the plugin boundary: an open reference deck ships for the open PDKs; a certified per-foundry deck stays private under that foundry's terms — the same split the rest of the Vyges flow uses.