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RISC-V 64: Add assembly code for SHA-512 #7833

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Merged
dgarske merged 1 commit into from
Aug 6, 2024
Merged

RISC-V 64: Add assembly code for SHA-512 #7833

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12 changes: 12 additions & 0 deletions src/include.am
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Original file line number Diff line number Diff line change
Expand Up @@ -234,6 +234,9 @@ src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/riscv/riscv-64-sha256
endif BUILD_RISCV_ASM

if BUILD_SHA512
if BUILD_RISCV_ASM
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/riscv/riscv-64-sha512.c
else
if BUILD_ARMASM_NEON
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/arm/armv8-sha512.c
if BUILD_ARMASM_INLINE
Expand Down Expand Up @@ -262,6 +265,7 @@ endif BUILD_INTELASM
endif !BUILD_X86_ASM
endif !BUILD_ARMASM
endif !BUILD_ARMASM_NEON
endif !BUILD_RISCV_ASM
endif BUILD_SHA512

if BUILD_SHA3
Expand Down Expand Up @@ -393,6 +397,9 @@ src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/riscv/riscv-64-sha256
endif BUILD_RISCV_ASM

if BUILD_SHA512
if BUILD_RISCV_ASM
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/riscv/riscv-64-sha512.c
else
if BUILD_ARMASM_NEON
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/arm/armv8-sha512.c
if BUILD_ARMASM_INLINE
Expand All @@ -419,6 +426,7 @@ src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/sha512_asm.S
endif BUILD_INTELASM
endif !BUILD_ARMASM
endif !BUILD_ARMASM_NEON
endif !BUILD_RISCV_ASM
endif BUILD_SHA512

if BUILD_SHA3
Expand Down Expand Up @@ -738,6 +746,9 @@ endif !BUILD_FIPS_CURRENT

if !BUILD_FIPS_CURRENT
if BUILD_SHA512
if BUILD_RISCV_ASM
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/riscv/riscv-64-sha512.c
else
if BUILD_ARMASM_NEON
src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/arm/armv8-sha512.c
if BUILD_ARMASM_INLINE
Expand Down Expand Up @@ -766,6 +777,7 @@ endif BUILD_INTELASM
endif !BUILD_X86_ASM
endif !BUILD_ARMASM
endif !BUILD_ARMASM_NEON
endif !BUILD_RISCV_ASM
endif BUILD_SHA512
endif !BUILD_FIPS_CURRENT

Expand Down
14 changes: 0 additions & 14 deletions wolfcrypt/src/port/riscv/riscv-64-sha256.c
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Original file line number Diff line number Diff line change
Expand Up @@ -600,13 +600,6 @@ static WC_INLINE void Sha256Transform(wc_Sha256* sha256, const byte* data,
(0b010 << 12) | (0b1110111 << 0) | \
(vd << 7) | (vs1 << 15) | (vs2 << 20))

#ifndef WOLFSSL_RISCV_VECTOR_BASE_BIT_MANIPULATION
/* Indecies to use with gather vector instruction to reverse bytes. */
static const word32 rev_idx[4] = {
0x00010203, 0x04050607, 0x08090a0b, 0x0c0d0e0f
};
#endif /* !WOLFSSL_RISCV_VECTOR_BASE_BIT_MANIPULATION */

#define RND4(w0, w1, w2, w3, k) \
/* Four rounds of compression. */ \
VADD_VV(REG_V7, w0, k) \
Expand Down Expand Up @@ -690,9 +683,6 @@ static void Sha256Transform(wc_Sha256* sha256, const byte* data,

: [blocks] "+r" (blocks), [data] "+r" (data), [k] "+r" (k)
: [digest] "r" (sha256->digest)
#ifndef WOLFSSL_RISCV_VECTOR_BASE_BIT_MANIPULATION
, [rev_idx] "r" (rev_idx)
#endif
: "cc", "memory", "t0", "t1"
);
}
Expand Down Expand Up @@ -884,10 +874,6 @@ static WC_INLINE void Sha256Final(wc_Sha256* sha256, byte* hash)
#endif
:
: [digest] "r" (sha256->digest), [hash] "r" (hash)
#if defined(WOLFSSL_RISCV_VECTOR_CRYPTO_ASM) && \
!defined(WOLFSSL_RISCV_VECTOR_BASE_BIT_MANIPULATION)
, [rev_idx] "r" (rev_idx)
#endif
: "cc", "memory", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
"a4", "a5", "a6", "a7"
);
Expand Down
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