Power Design Toolkit v9.9.0 — Power Stage Designer

Power Design Toolkit v9.9.0

发布日期：2026-10-22

本次更新完善功率级设计、磁性器件选型和环路分析，把参数计算、波形查看、控制器设计与报告导出连接成完整流程。

主要更新

• 新增 Power Stage Designer 独立入口：19 类直接功率级模型，并连接原有 LLC 半桥/全桥工作区。支持原理图元件选择、V/I 波形、峰值及有效值查看。
• 增加目标驱动参数建议、12 项工程计算工具、6 种严格 CCM 小信号模型与 5 类补偿网络；支持元件取整后重算及多工况/容差检查。
• 完善磁芯数据库来源追踪、缺失/冲突提示；增加 LLC 变压器漏感参与谐振的集成磁性设计路径，保留独立谐振电感方案。
• 完善 DAB、Vienna、三相两电平 PFC 的候选控制器比较、参数应用、会话保存恢复及报告/C99 导出；统一离散系数、采样时序和分析频段边界。
• 修正原理图遮线、点击区域、小屏布局、取消/重新打开窗口及旧结果失效处理，减少界面、文件和报告工况不一致。

下载

• Windows x64：PowerDesignTool-Windows-x64.zip，解压后运行 PowerDesignTool.exe。
• macOS Apple Silicon：PowerDesignTool-macOS-arm64.zip，解压后打开 PowerDesignTool.app。
• SHA256SUMS.txt 提供安装包校验值；bundle-proof 文件记录冻结程序自测证据。

验证与适用范围

发布源代码和 v9.9.0 标签固定于 2bf8f6e，使用该提交已通过三平台 CI 的原始 9.9.0 二进制包，没有重新标记旧版本。
Windows、macOS、Linux 测试通过，保留原测试的跳过项与预期失败项；Windows/macOS 冻结程序验收通过。新控制器候选/会话/导出链的更广覆盖来自源码及安装包测试，不等同于冻结自测覆盖全部工作流。

DAB 当前增强范围为功率指令电压环，不代表完整相移指令环或电流内环；Vienna 当前采用 ABC 控制。各拓扑保留其理想模型、纹波、频率和工况适用范围，T05/T11/T18 的完整 TI 可执行模型对等仍为 PARTIAL。缺失损耗项保留 UNKNOWN。仿真、模型及导出代码验证不能代替目标 DSP、实板和安全验证。

源提交与三平台验证

Power Design Toolkit v9.8.1 — Smart Control

Power Design Toolkit v9.8.1

Both Windows x64 and macOS arm64 frozen executables completed verified self-tests. Checksums and machine-readable evidence are attached. Software/model verification is not hardware validation.

9.8.1 — 2026-10-18

Fixed — Smart Control limits and evidence

• uses the active controller's actual output limits and reachable FM range for
  static PCMD headroom; missing absolute limits remain UNKNOWN;
• preserves explicit CONDITIONAL / UNKNOWN evidence and evaluates the same
  nominal PI across retained, compatible LLC/TTPL operating points;
• carries constraints, per-point results, conditional reasons, exact controller
  identity and model signatures through Apply and existing C99/research exports;
• invalidates stale candidates and evidence after model, input, controller or
  selected-operating-point changes.

Added — Reopen complete LLC/TTPL control sessions

• saves full-precision controller/model inputs, hidden sampling and timing
  fields, retained operating points, constraints and historical evidence;
• reopens LLC project JSON and TTPL control sessions as historical data; requires
  model recomputation and fresh candidate generation before explicit Apply;
• validates session versions, fields and resource limits, rejects malformed
  files before changing the current session, and saves files atomically.

Engineering boundary

• software/model evidence is not hardware validation; missing frequency,
  pole-stability and uncollected operating-point evidence remains explicit;
• no new hardware measurements, real ISR timing qualification or float32
  validation are included. See Smart Control evidence and sessions.

Publication verification

Application source and tag remain unchanged at bc969ab377d4b029cce351f3a38146d3e2a7659c. The Windows full test suite runs in Python UTF-8 mode because a tagged test reads UTF-8 JSON with the locale-default decoder; no additional tests are excluded and no assertions are relaxed. PyInstaller and the frozen-application self-test run without that test-only override. The verified original macOS package is retained.

Original tagged run · Recovery and publication

Power Design Toolkit v9.8.0 — Smart Control

Power Design Toolkit v9.8.0

Both Windows x64 and macOS arm64 frozen executables completed verified self-tests. Checksums and machine-readable evidence are attached. Software/model verification is not hardware validation.

9.8.0 — 2026-10-15

Added — DAB TPS and three-phase PFC engineering

• adds automatic DAB operating-point calculation, periodic waveform replay,
  sampled voltage-loop modeling, reference/load steps and PWM-verified
  constrained TPS optimization;
• adds three-phase two-level SVPWM/dq control and SRF/DDSRF/dual-SOGI PLL
  comparisons with diagrams, lock transients, ABC outputs, CSV and C99;
• extends two-level/Vienna analysis with device/inductor/capacitor RMS and peak
  stress, configured loss terms, PF and low-frequency ITHD.

Added — Magnetics and multi-harmonic controllers

• adds selectable quasi-PR compensation at harmonics 1/3/5/7/9/11 with
  branch/combined Bode, float32 coefficients and C99 functions;
• adds searchable core/bobbin presets and legacy reference records with source
  tracking, measured magnetic-loss comparison and complex-impedance fitting;
• includes an optional, independently tested 3C90 residual model with explicit
  material/domain limits; unproven surrogate TPS search remains excluded.

Fixed — Result integrity, models and desktop navigation

• invalidates failed/stale controller and loss-report exports and ignores old
  PFC worker results after newer requests;
• replaces sample-grid-sensitive DAB Cp differentiation with event-based RLC
  propagation, and matches the linear plant to the time simulation's discrete
  capacitor-energy update;
• fixes LLC three-phase waveform signal selection and preserves visible page
  parameters in Run Current;
• opens the launcher maximized with all six entries visible and keeps author
  contacts in the existing upper-right toolbar row without a separate banner;
• repairs controller-integration test doubles for the current keyword API and
  cleans up the waveform graphics scene before parent-widget destruction,
  preventing the reproduced Qt shutdown crash;
• uses theoretical DC gain for step metrics and reports insufficient response
  windows instead of false settling times; C99 verification accepts renamed files;
• preserves manual LLC tank/turns-ratio inputs, requested frequency grids and
  denominator signs; rejects non-finite coefficients and reversed limits;
• bases Web nominal stability on the kernel sampled-pole/margin checks and marks
  unqualified delay envelopes UNKNOWN; keeps control reports tied to their own
  operating point, supports Unicode metadata and counts every switch position;
• restores the global PR export action after successful automatic recalculation
  and omits unused zero-valued manual tank fields in automatic Web designs.

Release and engineering boundary

• pins Qt bindings to the last published 6.11.2 baseline after the unbounded
  6.12.0/Python 3.11 candidate aborted during post-test garbage collection;
• joins update-check workers before parent/application teardown, suppresses
  callbacks to closed owners and writes startup proof only after worker cleanup;
• synchronizes package/runtime/version-test/README to 9.8.0; Windows x64 and
  macOS arm64 packages remain subject to full CI and frozen-executable gates;
• retains LLC/TTPL exact H(z), FRA tuning maps, C99 and MATLAB/Python research
  export capabilities from earlier releases;
• DAB Cp is a periodic power map, not a full Cp transient model. TPS ZVS remains
  UNKNOWN. Missing device/core/ESR inputs produce partial loss/efficiency
  results. Software and data-based checks do not establish hardware validation.

See desktop/model audit and
engineering scope for evidence and limitations.