drivers: disk: sdmmc_stm32: Mount fails for H7 with D-Cache enabled

[attie-argentum]

Describe the bug

Attempting to use an STM32H753 (custom board), with a MicroSD card connected to SDMMC1 (4-bit, IDMA enabled, one partition, FAT).

When trying to mount the filesystem, an error occurs. However querying the card geometry succeeds.

Disabling D-Cache (CONFIG_DCACHE=n), or applying the patch below resolves the issue.

Regression

• This is a regression.

Steps to reproduce

&sdmmc1 {
    clocks = <&rcc STM32_CLOCK(AHB3, 16U)>,
        <&rcc STM32_SRC_PLL1_Q SDMMC_SEL(0)>; /* 48 MHz */
    clk-bypass;
    idma;
    pinctrl-0 = <
        &sdmmc1_d0_pc8
        &sdmmc1_d1_pc9
        &sdmmc1_d2_pc10
        &sdmmc1_d3_pc11
        &sdmmc1_ck_pc12
        &sdmmc1_cmd_pd2
    >;
    pinctrl-names = "default";
    bus-width = <4>;
    pwr-gpios = <&gpioi 1 GPIO_ACTIVE_HIGH>;
    disk-name = "SD";
    status = "okay";
};

static FATFS fatfs_work;
static struct fs_mount_t fatfs_mnt = {
    .type = FS_FATFS,
    .fs_data = &fatfs_work,
    .mnt_point = "/SD:",
    .flags = FS_MOUNT_FLAG_NO_FORMAT,
    .storage_dev = DEVICE_DT_GET(DT_NODELABEL(sdmmc1)),
};

void sdmmc_setup(void) {
    int ret;

	/* copied from samples/subsys/fs/fs_sample/src/main.c */ 
    do {
        static const char *disk_pdrv = "SD";
        uint64_t memory_size_mb;
        uint32_t block_count;
        uint32_t block_size;

        if (disk_access_ioctl(disk_pdrv,
                DISK_IOCTL_CTRL_INIT, NULL) != 0) {
            LOG_ERR("Storage init ERROR!");
            break;
        }

        if (disk_access_ioctl(disk_pdrv,
                DISK_IOCTL_GET_SECTOR_COUNT, &block_count)) {
            LOG_ERR("Unable to get sector count");
            break;
        }
        LOG_INF("Block count %u", block_count);

        if (disk_access_ioctl(disk_pdrv,
                DISK_IOCTL_GET_SECTOR_SIZE, &block_size)) {
            LOG_ERR("Unable to get sector size");
            break;
        }
        printk("Sector size %u\n", block_size);

        memory_size_mb = (uint64_t)block_count * block_size;
        printk("Memory Size(MB) %u\n", (uint32_t)(memory_size_mb >> 20));

        if (disk_access_ioctl(disk_pdrv,
                DISK_IOCTL_CTRL_DEINIT, NULL) != 0) {
            LOG_ERR("Storage deinit ERROR!");
            break;
        }
    } while (0);

    ret = fs_mount(&fatfs_mnt); /* returns -19 / ENODEV! */
    if (ret != 0) {
        fatal();
    }
}

Relevant log output

*** Booting Zephyr OS build v4.3.0-1476-gd31c6e95033f ***
[00:00:01.128,000] <inf> bringup: Block count 62357504
Sector size 512
Memory Size(MB) 30448
[00:00:01.129,000] <err> fs: fs mount error (-19)

Impact

Functional Limitation – Some features not working as expected, but system usable.

Environment

• Linux
• arm-none-eabi-gcc (Arm GNU Toolchain 14.3.Rel1 (Build arm-14.174)) 14.3.1 20250623
• Zephyr: d31c6e9

Additional Context

I've attached a patch - applying this with D-Cache enabled seems to do the trick, but I don't think this is necessarily the correct approach / location...

0001-WIP-Fix-D-Cache-with-STM32H7-SDMMC-IDMA.patch

[attie-argentum]

As a quick follow-up, I believe there are also issues with D-Cache around USB... I'm using ULPI (DT snippet below)

I have a test application which pulls data from SD/MMC, into a ringbuf, into a CDC-ACM UART (compatible = "zephyr,cdc-acm-uart") using its IRQ callback and uart_fifo_fill().

• With D-Cache disabled, I see perfect data from SD/MMC -> USB host at ~4.9 MB/s
• With D-Cache enabled, I see throughput of ~9.2 MB/s with "some" errors (unquantified, sporadic, from single bytes to large chunks...)

/ {
    soc {
        /* copied from: zephyr/dts/arm/st/h7/stm32h745.dtsi */
        usbotg_hs: usb@40040000 {
            compatible = "st,stm32-otghs";
            reg = <0x40040000 0x40000>;
            interrupts = <74 0>, <75 0>, <76 0>, <77 0>;
            interrupt-names = "ep1_out", "ep1_in", "wkup", "otghs";
            num-bidir-endpoints = <9>;
            ram-size = <4096>;
            maximum-speed = "full-speed";
            clocks = <&rcc STM32_CLOCK(AHB1, 25U)>,
                 <&rcc STM32_SRC_HSI48 USB_SEL(3)>;
            phys = <&otghs_fs_phy>;
            status = "disabled";
        };
    };

    /* copied from: zephyr/boards/st/stm32h757i_eval/stm32h757i_eval_stm32h757xx_m7.dts */
    otghs_ulpi_phy: otghs_ulpis_phy {
        compatible = "usb-ulpi-phy";
        #phy-cells = <0>;
    };
};

zephyr_udc0: &usbotg_hs {
    pinctrl-0 = <
        &usb_otg_hs_ulpi_d0_pa3
        &usb_otg_hs_ulpi_d1_pb0
        &usb_otg_hs_ulpi_d2_pb1
        &usb_otg_hs_ulpi_d3_pb10
        &usb_otg_hs_ulpi_d4_pb11
        &usb_otg_hs_ulpi_d5_pb12
        &usb_otg_hs_ulpi_d6_pb13
        &usb_otg_hs_ulpi_d7_pb5
        &usb_otg_hs_ulpi_stp_pc0
        &usb_otg_hs_ulpi_dir_pc2
        &usb_otg_hs_ulpi_nxt_pc3
        &usb_otg_hs_ulpi_ck_pa5
    >;
    pinctrl-names = "default";
    maximum-speed = "high-speed"; /* 480 Mbit/s */
    clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x06000000>,
        <&rcc STM32_SRC_PLL1_Q USB_SEL(1)>;
    phys = <&otghs_ulpi_phy>;
    status = "okay";

    usb_uart: cdc_acm_uart0 {
        compatible = "zephyr,cdc-acm-uart";
    };
};

[erwango]

Thanks @attie-argentum, don't hesitate to submit your patch as a PR, I don't think it is quite far from an acceptable solution.

Regarding the USB issue, please open a dedicated issue.

[attie-argentum]

Excellent, thanks @erwango - I was hesitant as I suspected cache coherency should be handled elsewhere (possibly in STM32 HAL?). If you're still happy, then I'll proceed with a PR.

[erwango]

Btw, @djiatsaf-st on missing SD card on test bench ;-)