drivers: sdmmc: stm32: introduce cache flush & invalidation for DMA #100409
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attie-argentum
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LGTM with a nitpicking comment.
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In light of the discussion, and my brief investigation, I've opted to maintain the I have confirmed that things "work" when aligning |
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Introduce steps to maintain cache coherence around DMA accesses to the underlying SD / eMMC storage. Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
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I encountered issues while mounting a FAT filesystem with D-Cache enabled on an STM32H753.
This patch introduces a call to
sys_cache_data_flush_and_invd_range()beforeHAL_*_ReadBlocks_DMA(), andsys_cache_data_flush_range()beforeHAL_*_WriteBlocks_DMA().Fixes #100377