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1 change: 1 addition & 0 deletions drivers/cache/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@ zephyr_library_sources_ifdef(CONFIG_CACHE_ANDES cache_andes.c)
zephyr_library_sources_ifdef(CONFIG_CACHE_ASPEED cache_aspeed.c)
zephyr_library_sources_ifdef(CONFIG_CACHE_BFLB_L1C cache_bflb_l1c.c)
zephyr_library_sources_ifdef(CONFIG_CACHE_NRF_CACHE cache_nrf.c)
zephyr_library_sources_ifdef(CONFIG_CACHE_NXP_LMEM_CACHE cache_nxp_lmem_cache.c)
zephyr_library_sources_ifdef(CONFIG_CACHE_NXP_XCACHE cache_nxp_xcache.c)
zephyr_library_sources_ifdef(CONFIG_CACHE_STM32 cache_stm32.c)
# zephyr-keep-sorted-stop
1 change: 1 addition & 0 deletions drivers/cache/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@ source "drivers/cache/Kconfig.andes"
source "drivers/cache/Kconfig.aspeed"
source "drivers/cache/Kconfig.bflb"
source "drivers/cache/Kconfig.nrf"
source "drivers/cache/Kconfig.nxp_lmem_cache"
source "drivers/cache/Kconfig.nxp_xcache"
source "drivers/cache/Kconfig.stm32"
# zephyr-keep-sorted-stop
Expand Down
10 changes: 10 additions & 0 deletions drivers/cache/Kconfig.nxp_lmem_cache
Original file line number Diff line number Diff line change
@@ -0,0 +1,10 @@
# Copyright 2025 NXP
# SPDX-License-Identifier: Apache-2.0

config CACHE_NXP_LMEM_CACHE
bool "NXP LMEM cache driver"
default y
select CACHE_HAS_DRIVER
depends on HAS_MCUX_LMEM_CACHE
help
This option enables the LMEM cache driver for NXP SOCs.
62 changes: 62 additions & 0 deletions drivers/cache/cache_nxp_lmem_cache.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,62 @@
/*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/kernel.h>
#include <zephyr/drivers/cache.h>
#include <zephyr/logging/log.h>
#include <fsl_cache.h>

void cache_instr_enable(void)
{
L1CACHE_EnableCodeCache();
}

void cache_instr_disable(void)
{
L1CACHE_DisableCodeCache();
}

int cache_instr_flush_all(void)
{
L1CACHE_CleanCodeCache();

return 0;
}

int cache_instr_invd_all(void)
{
L1CACHE_InvalidateCodeCache();

return 0;
}

int cache_instr_flush_and_invd_all(void)
{
L1CACHE_CleanInvalidateCodeCache();

return 0;
}

int cache_instr_flush_range(void *addr, size_t size)
{
L1CACHE_CleanCodeCacheByRange((uint32_t)addr, (uint32_t)size);

return 0;
}

int cache_instr_invd_range(void *addr, size_t size)
{
L1CACHE_InvalidateCodeCacheByRange((uint32_t)addr, (uint32_t)size);

return 0;
}

int cache_instr_flush_and_invd_range(void *addr, size_t size)
{
L1CACHE_CleanInvalidateCodeCacheByRange((uint32_t)addr, (uint32_t)size);

return 0;
}
7 changes: 6 additions & 1 deletion modules/hal_nxp/mcux/Kconfig.mcux
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
# MCUXpresso SDK

# Copyright (c) 2016, Freescale Semiconductor, Inc.
# Copyright 2024 NXP
# Copyright 2024, 2025 NXP
# SPDX-License-Identifier: Apache-2.0

config HAS_MCUX
Expand Down Expand Up @@ -52,6 +52,11 @@ config HAS_MCUX_XCACHE
help
Set if the XCACHE module is present on the SoC.

config HAS_MCUX_LMEM_CACHE
bool
help
Set if the LMEM Cache module is present on the SoC.

config HAS_NXP_MONOLITHIC_NBU
bool
help
Expand Down
2 changes: 2 additions & 0 deletions modules/hal_nxp/mcux/mcux-sdk-ng/drivers/drivers.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -200,6 +200,8 @@ elseif((${MCUX_DEVICE} MATCHES "MIMXRT(5|6)") OR (${MCUX_DEVICE} MATCHES "RW61")
set_variable_ifdef(CONFIG_HAS_MCUX_CACHE CONFIG_MCUX_COMPONENT_driver.cache_cache64)
elseif((${MCUX_DEVICE} MATCHES "MK(28|66)") OR (${MCUX_DEVICE} MATCHES "MKE(14|16|18)") OR (CONFIG_SOC_MIMXRT1166_CM4) OR (CONFIG_SOC_MIMXRT1176_CM4))
set_variable_ifdef(CONFIG_HAS_MCUX_CACHE CONFIG_MCUX_COMPONENT_driver.cache_lmem)
elseif(CONFIG_SOC_SERIES_MCXE24X)
set_variable_ifdef(CONFIG_HAS_MCUX_LMEM_CACHE CONFIG_MCUX_COMPONENT_driver.cache_lmem)
elseif(CONFIG_CPU_CORTEX_A)
set_variable_ifdef(CONFIG_HAS_MCUX_CACHE CONFIG_MCUX_COMPONENT_driver.cache_armv8_a)
endif()
Expand Down
2 changes: 2 additions & 0 deletions soc/nxp/mcx/mcxe/mcxe24x/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@ config SOC_SERIES_MCXE24X
select HAS_MCUX
select CLOCK_CONTROL
select SOC_RESET_HOOK
select CPU_HAS_ICACHE
select HAS_MCUX_LMEM_CACHE

if SOC_SERIES_MCXE24X

Expand Down
8 changes: 8 additions & 0 deletions soc/nxp/mcx/mcxe/mcxe24x/Kconfig.defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -19,4 +19,12 @@ config CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
config GPIO
default y

# Enable cache management features
configdefault CACHE_MANAGEMENT
default y

choice CACHE_TYPE
default EXTERNAL_CACHE
endchoice

endif # SOC_SERIES_MCXE24X