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Support imx93 video pll driver #98554
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Support imx93 video pll driver #98554
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@JiafeiPan The conflicts have been fixed |
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@mmahadevan108 Could you please help review this pull request? |
| description: | ||
| Number of data lanes. | ||
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| pixel-format: |
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| pixel-format: |
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pixel-format:
Removed the repeat code
| # SPDX-License-Identifier: Apache-2.0 | ||
| # | ||
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| description: Raydium RM67199 Panel |
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| description: Raydium RM67199 Panel | |
| description: Raydium RM69380 controller for DSI panels |
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Fixed to " Raydium RM67199 controller for DSI panels"
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This should be in SoC's or board's initialization code, does not fit the driver definition.
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This should be in SoC's or board's initialization code, does not fit the driver definition.
Thank you for your review. The VIDEO_PLL operation indeed needs to be handled at the SoC stage. I made this change because on the iMX93 we need to support multiple panels, different shields require separate configuration of the VIDEO_PLL frequency. By implementing it as an independent clock control driver, we can configure the VIDEO_PLL frequency more flexibly.
drivers/display/Kconfig.rm67199
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| # SPDX-License-Identifier: Apache-2.0 | ||
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| config RM67199 | ||
| bool "RM67199 display driver" |
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| bool "RM67199 display driver" | |
| bool "RM67199 display controller driver" |
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Fixed
drivers/display/Kconfig.rm67199
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| select MIPI_DSI | ||
| depends on DT_HAS_RAYDIUM_RM67199_ENABLED | ||
| help | ||
| Enable driver for RM67199 display. |
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| Enable driver for RM67199 display. | |
| Enable driver for RM67199 display controller. |
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Fixed
drivers/display/display_rm67199.c
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| if (config->bl_gpio.port != NULL) { | ||
| return gpio_pin_set_dt(&config->bl_gpio, 1); | ||
| } else { |
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| } else { | |
| } |
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Fixed
drivers/display/display_rm67199.c
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| .set_orientation = rm67199_set_orientation, | ||
| }; | ||
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| #define RM67199_PANEL(id) \ |
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| #define RM67199_PANEL(id) \ | |
| #define RM67199_CONTROLLER(id) \ |
replace all instances.
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replace all instances.
Fixed
| Overview | ||
| ******** | ||
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| The NXP MX8 DSI OLED1A Panel is a high-resolution OLED display panel |
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| The NXP MX8 DSI OLED1A Panel is a high-resolution OLED display panel | |
| The NXP MX8 DSI OLED1A shield is a high-resolution OLED display panel |
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Fixed
| The NXP MX8 DSI OLED1A Panel is a high-resolution OLED display panel | ||
| designed for use with NXP i.MX8 series processors. This panel provides | ||
| excellent color reproduction and contrast ratio through OLED technology. | ||
| The display connects via MIPI DSI interface and offers superior visual |
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| The display connects via MIPI DSI interface and offers superior visual | |
| The display shield connects via MIPI DSI interface and offers superior visual |
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Done
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| .. target-notes:: | ||
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| .. _NXP MX8 DSI OLED1A Panel website: |
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| .. _NXP MX8 DSI OLED1A Panel website: | |
| .. _NXP MX8 DSI OLED1A Shield website: |
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Fixed the name
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Added nxp_imx93_video_pll driver to support display function Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
Added video_pll instance to soc dtsi. Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
Added rm67199 driver for i.MX93 display. Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com> Signed-off-by: Winteri Wang <dongjie.wang@nxp.com>
Added MX8_DSI_OLED1A panel and enable display on imx93_evk ddr target Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
Updated display tests to run the nxp_mx8_dsi_oled1a shield. Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
Fix pointer-to-integer cast error by using uintptr_t intermediate cast instead of direct uint64_t cast. Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
Sync hal_nxp repo Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
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The following west manifest projects have changed revision in this Pull Request:
⛔ DNM label due to: 1 project with PR revision Note: This message is automatically posted and updated by the Manifest GitHub Action. |
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