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v0.3 - ARM Timer

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@HalfTimeOfLife HalfTimeOfLife released this 24 Sep 23:22
· 1 commit to master since this release
v0.3
dcf6bea

Periodic timer interrupts for the AArch64 bare-metal kernel, built on the GICv2 support introduced in v0.2.

Added

  • src/timer/timer.s: timer_init/timer_set_interval, configures the non-secure EL1 physical timer (CNTP_TVAL_EL0/CNTP_CTL_EL0) for a ~100 Hz tick
  • src/gic/gic.s: gic_init extended to enable the timer's PPI (GIC ID 30, confirmed via QEMU's device tree) alongside the existing SGI
  • src/exceptions/handlers.s: el_irq now dispatches by interrupt ID between the SGI test and the timer; timer_irq re-arms the one-shot timer on every interrupt and tracks a running tick_count
  • notes/v03.md: full theory and implementation walkthrough (ARM generic timer architecture, PPI ID derivation from the device tree, register reference)

Verification

The kernel boots on QEMU virt, runs through the existing svc/SGI tests from v0.2, then the timer fires periodically and tick_count is printed every 512 ticks:

Tick: 0x0000000000000200
Tick: 0x0000000000000400
Tick: 0x0000000000000600
Tick: 0x0000000000000800

Each value increases by exactly 512, confirming the timer re-arms and fires correctly on every interrupt.

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