Gated CPA
Initially, this appears to be a sense amp for reading two columns of the core memory. The board has two threshold amps/latches that feed into what looks like an output amp. We believe the cross-coupled transistors with inductors in the amplifier serve as latches also. It is however a fairly uncommon configuration. Additionally, we're not sure why it's "gated", although pin 1 may be an effective "enable". Pin 3 may also be a bias voltage or "gate". The back-biased diodes on the transformer legs are obviously for switching spike elimination.
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This schematic was reverse engineered by tracing out each individual line on the board itself. We are fairly confident it is mostly correct, but there could be errors still present.
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