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fh8856: fix JL1101 PHY detection, PHY reset GPIO and SD1 pinctrl on V100 boards #54

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fh8856: fix JL1101 PHY detection, PHY reset GPIO and SD1 pinctrl on V100 boards #54

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15 changes: 14 additions & 1 deletion arch/arm/mach-fh/board-fh8856.c
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Original file line number Diff line number Diff line change
Expand Up @@ -410,6 +410,19 @@ static void fh_set_rmii_speed(int speed)

static void fh_phy_reset(void)
{
#ifdef CONFIG_GPIO_EMACPHY_RESET_UNWIRED
/*
* The board config declares CONFIG_GPIO_EMACPHY_RESET as not routed to
* the PHY. On FH8856 boards such as the Asecam PB1 (IF5653-V2) that
* GPIO is pad 46, which is PWM7 there; pulsing it while the RXDV strap
* floats leaves the JL1101 unresponsive on MDIO. The vendor firmware
* does not reset the PHY either, and U-Boot has already brought it up.
*
* Boards that do wire the line - FH8852 among them - keep the reset
* sequence below.
*/
return;

@qodo-free-for-open-source-projects qodo-free-for-open-source-projects Bot Sep 5, 2026

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Action required

1. Fh8852 phy reset disabled 🐞 Bug ≡ Correctness

The unconditional return disables PHY reset for FH8852 as well as FH8856, because both machines
share this board file and GMAC callback. FH8852 explicitly defines GPIO11 as its Ethernet PHY reset,
so its PHY may remain uninitialized or fail detection during boot.
Agent Prompt 
## Issue description
The new unconditional return in `fh_phy_reset()` disables the hardware PHY reset for every machine using the shared FH8856 architecture code, including FH8852 boards whose configuration explicitly identifies GPIO11 as the Ethernet PHY reset.

## Issue Context
Keep the no-reset behavior for the affected FH8856 board configuration, but retain the existing GPIO reset sequence for FH8852 and any other configuration where the reset line is wired. A board-specific callback or compile-time board guard can provide this distinction.

## Fix Focus Areas
- arch/arm/mach-fh/board-fh8856.c[411-447]
- arch/arm/mach-fh/include/mach/board_config.fh8852.appboard[17-24]

ⓘ Copy this prompt and use it to remediate the issue with your preferred AI generation tools

#else
/*
* RXDV must be low during phy reset
*/
Expand All @@ -428,7 +441,7 @@ static void fh_phy_reset(void)
gpio_free(CONFIG_GPIO_EMACPHY_RXDV);

fh_pmu_set_reg(0xe8, 0x00101030);

#endif
}

static struct fh_gmac_platform_data fh_gmac_data = {
Expand Down
9 changes: 8 additions & 1 deletion arch/arm/mach-fh/include/mach/board_config.fh8856.appboard
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Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,13 @@
* GPIO55 -> SD1 WIFI Interrupt
*/

/*
* GPIO11 is pad 46 (PWM7) on this board and is not routed to the PHY reset
* pin; see fh_phy_reset() in board-fh8856.c. Boards that do wire it, such as
* the FH8852 appboard, must not define this.
*/
#define CONFIG_GPIO_EMACPHY_RESET_UNWIRED 1

#define CONFIG_GPIO_EMACPHY_RESET 11
#define CONFIG_GPIO_EMACPHY_RXDV 41

Expand All @@ -39,7 +46,7 @@
#define FH_BOARD_8856
#define CONFIG_PINCTRL_SELECT \
"I2C0", "I2C1", "MIPI", "RMII", "SD0_NO_WP", \
"SD1_NO_WP", "SSI0_4BIT", "UART0", "GPIO0", "GPIO1", \
"SSI0_4BIT", "UART0", "GPIO0", "GPIO1", \
"GPIO2", "GPIO3", "GPIO11", "GPIO13", "GPIO14", \
"GPIO19", "GPIO20", "GPIO24", "GPIO25", "GPIO26", \
"GPIO27", "GPIO28", "GPIO53", "GPIO55"
Expand Down
9 changes: 8 additions & 1 deletion arch/arm/mach-fh/include/mach/board_config.fh8856.testboard
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Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,13 @@
* GPIO55 -> SD1 WIFI Interrupt
*/

/*
* GPIO11 is pad 46 (PWM7) on this board and is not routed to the PHY reset
* pin; see fh_phy_reset() in board-fh8856.c. Boards that do wire it, such as
* the FH8852 appboard, must not define this.
*/
#define CONFIG_GPIO_EMACPHY_RESET_UNWIRED 1

#define CONFIG_GPIO_EMACPHY_RESET 11
#define CONFIG_GPIO_EMACPHY_RXDV 41

Expand All @@ -39,7 +46,7 @@
#define FH_BOARD_8856
#define CONFIG_PINCTRL_SELECT \
"I2C0", "I2C1", "MIPI", "RMII", "SD0_NO_WP", \
"SD1_NO_WP", "SSI0_4BIT", "UART0", "GPIO0", "GPIO1", \
"SSI0_4BIT", "UART0", "GPIO0", "GPIO1", \
"GPIO2", "GPIO3", "GPIO11", "GPIO13", "GPIO14", \
"GPIO19", "GPIO20", "GPIO24", "GPIO25", "GPIO26", \
"GPIO27", "GPIO28", "GPIO53", "GPIO55"
Expand Down
9 changes: 8 additions & 1 deletion arch/arm/mach-fh/include/mach/board_config.h
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Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,13 @@
* GPIO55 -> SD1 WIFI Interrupt
*/

/*
* GPIO11 is pad 46 (PWM7) on this board and is not routed to the PHY reset
* pin; see fh_phy_reset() in board-fh8856.c. Boards that do wire it, such as
* the FH8852 appboard, must not define this.
*/
#define CONFIG_GPIO_EMACPHY_RESET_UNWIRED 1

#define CONFIG_GPIO_EMACPHY_RESET 11
#define CONFIG_GPIO_EMACPHY_RXDV 41

Expand All @@ -39,7 +46,7 @@
#define FH_BOARD_8856
#define CONFIG_PINCTRL_SELECT \
"I2C0", "I2C1", "MIPI", "RMII", "SD0_NO_WP", \
"SD1_NO_WP", "SSI0_4BIT", "UART0", "GPIO0", "GPIO1", \
"SSI0_4BIT", "UART0", "GPIO0", "GPIO1", \
"GPIO2", "GPIO3", "GPIO11", "GPIO13", "GPIO14", \
"GPIO19", "GPIO20", "GPIO24", "GPIO25", "GPIO26", \
"GPIO27", "GPIO28", "GPIO53", "GPIO55"
Expand Down
2 changes: 2 additions & 0 deletions drivers/net/fh_gmac/fh_gmac_phyt.c
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Original file line number Diff line number Diff line change
Expand Up @@ -84,6 +84,7 @@ int fh_mdio_set_mii(struct mii_bus *bus)
switch (pGmac->phydev->phy_id) {
case FH_GMAC_PHY_RTL8201:
case FH_GMAC_PHY_JL1101:
case FH_GMAC_PHY_JL1101_B:
fh_mdio_write(bus, phyid,
gmac_phyt_rtl8201_page_select, 7);
fh_mdio_write(bus, phyid,
Expand Down Expand Up @@ -118,6 +119,7 @@ int fh_mdio_set_mii(struct mii_bus *bus)
switch (pGmac->phydev->phy_id) {
case FH_GMAC_PHY_RTL8201:
case FH_GMAC_PHY_JL1101:
case FH_GMAC_PHY_JL1101_B:
fh_mdio_write(bus, phyid,
gmac_phyt_rtl8201_page_select, 7);
fh_mdio_write(bus, phyid,
Expand Down
3 changes: 3 additions & 0 deletions drivers/net/fh_gmac/fh_gmac_phyt.h
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Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,9 @@
#define FH_GMAC_PHY_RTL8201 0x001CC816
#define FH_GMAC_PHY_TI83848 0xFFFFFFFF
#define FH_GMAC_PHY_JL1101 0x937c4023
/* JLSemi JL1101, newer stepping (e.g. Asecam PB1 / IF5653-V2 with FH8856).
Same RMII setup as 0x937c4023. */
#define FH_GMAC_PHY_JL1101_B 0x937c4024

enum
{
Expand Down