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Memory System

André Borchert edited this page Jun 13, 2026 · 3 revisions

Memory System

Purpose

This page explains OSAI's memory model for CPU-only AI workloads.

Contents

Why Memory Matters

CPU-only AI is often memory-bound. Effective performance depends on placement, sharing, page-fault behavior, and avoiding duplicate model copies.

Arenas

OSAI should use explicit arenas for:

  • shared read-only model weights;
  • private KV/cache state;
  • source-code indexes;
  • tokenizer state;
  • network buffers;
  • build output;
  • logs and telemetry.

No swap should be used for AI memory.

Hugepages and Prefaulting

Model arenas should use hugepages or large pages where supported. Hot arenas should be prefaulted before service READY.

Target invariant:

post-warmup page faults on hot AI paths = 0

NUMA and Bandwidth

On Intel Xeon, a latency-sensitive AI Cell should remain inside one NUMA node by default. Model weights should be NUMA-local or deliberately replicated.

On ARM/NVIDIA N1X-compatible systems, memory policy must account for LPDDR or unified memory behavior and cluster topology.

Admission Control

OSAI should refuse to start or scale an AI Cell when memory bandwidth pressure would violate existing service contracts.

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