Project Tracker

Project Tracker

Purpose

This page tracks OSAI milestones from the original QEMU bring-up work through the full OS milestone, then lists the CPU implementation backlog that starts only after the full OS core is complete.

The tracker is intentionally conservative. A checked item means the local repository and QEMU gate already have code, tests, or documentation proving that milestone. An unchecked item means it remains future engineering work.

Contents

• Status Legend
• Current Phase Summary
• Milestones 0-33: QEMU Readiness Track
• Milestones 34-42: Full OS Completion Track
• Milestones 43+: CPU Implementation Track
• Post-Full-OS CPU Implementation Backlog
• Current Rule
• Related Pages

Status Legend

Marker	Meaning
✅ Done	Implemented and covered by the current QEMU gates.
🔵 Active	Current or next planned engineering work.
⬜ Pending	Planned but not implemented yet.
⚠️ Blocked	Waiting on prerequisite design, code, hardware, or tooling.

Current Phase Summary

Range	Phase	Status	Gate
0-7	Repository, toolchain, boot foundation	✅ Done	make
8-15	Kernel, memory, devices, AI Cell MVP	✅ Done	make qemu-smoke
16-22	EL0 userspace, heap, VMM, VirtIO, filesystem, telemetry	✅ Done	make qemu-readiness-gate
23-33	QEMU release-candidate readiness	✅ Done	make qemu-readiness-gate
34-42	Full OS completion	✅ Done	make qemu-full-os-rc
43-48	Intel Desktop QEMU bring-up	✅ Done	make qemu-x86_64-smoke
49+	CPU and hardware implementations	🔵 Active	starts with Intel Desktop placement policy

Milestones 0-33: QEMU Readiness Track

These milestones establish the current QEMU release-candidate readiness gate. They do not mean OSAI is a production-complete OS.

Milestone	Phase	Deliverable	Status
0	Repository foundation	Clean repo layout, docs split, wiki, build artifact ignores	✅ Done
1	macOS toolchain	QEMU, LLVM, LLD, Python, mtools, firmware checks	✅ Done
2	Build system	Build scripts and AArch64 image generation	✅ Done
3	UEFI loader	AArch64 UEFI loader loads kernel.elf	✅ Done
4	Kernel entry	Kernel starts after UEFI ExitBootServices	✅ Done
5	Serial logging	Deterministic serial console and boot markers	✅ Done
6	UEFI memory map	Memory map passed from loader and parsed by kernel	✅ Done
7	Physical memory manager	PMM tracks total, free, and reserved pages	✅ Done
8	AArch64 VMM	Page tables, map/unmap checks, MMIO mappings	✅ Done
9	Exceptions	Controlled exception path and page fault reporting	✅ Done
10	Timer and GIC	Generic timer and interrupt-controller discovery	✅ Done
11	SMP state	PSCI CPU bring-up and per-core registry	✅ Done
12	VirtIO block	Split VirtIO block path with read/write/error/reset tests	✅ Done
13	VirtIO net	Split VirtIO net path with malformed/drop/reset tests	✅ Done
14	Minimal control plane	Early supervisor/control-plane boot logic	✅ Done
15	AI Cell MVP	AI Cell lifecycle, core lease metadata, shared model arena MVP	✅ Done
16	Real EL0 userspace	User/kernel split, EL0 return path, syscall ABI, real /init ELF	✅ Done
17	Kernel heap	PMM/VMM-backed heap and page-backed allocations	✅ Done
18	VMM enforcement	RO/NX tests, guard pages, segment separation, map/unmap APIs	✅ Done
19	VirtIO cleanup	Shared VirtIO transport plus block and net drivers	✅ Done
20	Filesystem payload	VirtIO-backed read-only filesystem with /init and config	✅ Done
21	AI Cell enforcement	Core, arena, NIC queue, workspace, and conflict checks	✅ Done
22	Telemetry harness	Standard boot markers and JSON-like counters	✅ Done
23	Process lifecycle	Process table, loaded/running/exited/failed states, kernel resume	✅ Done
24	Userspace control plane	/bin/service-manager, status, restart, rollback, update syscalls	✅ Done
25	Disk persistence	Serialized state records, reboot reload, rollback behavior	✅ Done
26	Networking depth	Queue-backed packet flow, UDP flow table, TCP timeout smoke path	✅ Done
27	CPU-only AI runtime depth	Model-loader boundary, tokenizer/runtime boundary, shared weights, private KV/cache	✅ Done
28	Security enforcement	Capability, filesystem, workspace, sandbox, update, rollback checks	✅ Done
29	QEMU release candidate	Single readiness gate across boot, runtime, security, docs	✅ Done
30	QEMU CPU matrix	ARM64 boot tiers and x86_64 command tiers	✅ Done
31	ABI freeze	Syscall ABI and telemetry schema frozen for QEMU RC	✅ Done
32	Format freeze	Filesystem, persistence, and service descriptor formats frozen	✅ Done
33	Hardware-readiness gate	make qemu-readiness-gate passes and emits readiness report	✅ Done

Milestones 34-42: Full OS Completion Track

These milestones are the remaining QEMU full-OS work before starting CPU-specific implementation work. They should be completed in QEMU first so Intel, Xeon, AMD, and ARM/NVIDIA ports inherit a stable OS contract instead of half-finished platform-specific code.

Milestone	Phase	Deliverable	Status
34	Full filesystem	Allocator-backed mutable filesystem with directories, multi-sector files, journal replay, service/workspace/update records, commit/rollback telemetry	✅ Done
35	Process supervisor	Real service tree, child restart policy, crash handling, process cleanup, service logs	✅ Done
36	Network stack maturity	Queue-backed UDP/TCP beyond smoke paths, timeouts, retransmit policy, per-core flow ownership	✅ Done
37	CPU-only model runtime	Real model file loader, tokenizer binding, CPU kernel dispatch boundary, admission checks	✅ Done
38	AI Cell production contract	Stable AI Cell descriptor ABI, resource admission, arena accounting, queue binding, workspace lifecycle	✅ Done
39	Security hardening	Signed update policy, key handling, admin capability model, sandbox escape tests, rollback authorization	✅ Done
40	Update and rollback system	Install/update transaction records, rollback points, boot fallback, failed-update recovery	✅ Done
41	Admin control plane	SSH-only/admin shell plan, service inspection, status export, log retrieval, remote-safe commands	✅ Done
42	Full OS release candidate	Full QEMU OS gate with stable ABI, filesystem, process, networking, AI Cell, security, and telemetry contracts	✅ Done

Milestones 43+: CPU Implementation Track

These milestones start after the QEMU full OS release candidate. They are implementation work for CPU and hardware targets, not performance claims.

Milestone	Phase	Deliverable	Status
43	Intel Desktop x86_64 boot	Build and boot an x86_64 UEFI image in QEMU with deterministic serial markers	✅ Done
44	Intel Desktop early exceptions	IDT, fault reporting, and early panic path for x86_64	✅ Done
45	Intel Desktop memory map	Parse x86_64 UEFI descriptors into PMM/VMM state	✅ Done
46	Intel Desktop page tables	Higher-half/user split, RO/NX enforcement, MMIO mappings, stack guards	✅ Done
47	Intel Desktop timers/APIC	Local APIC, IOAPIC planning, HPET/TSC-deadline policy	✅ Done
48	Intel Desktop PCI/NVMe/NIC discovery	PCIe enumeration sufficient for NVMe and NIC bring-up	✅ Done
49	Intel Desktop placement policy	P-core/E-core metadata, SMT policy, hot-core isolation telemetry	🔵 Active next
50	Intel Desktop OS contract port	Bring QEMU full OS contracts onto x86_64: userspace, filesystem, networking, AI Cell, security, telemetry	⬜ Pending
51	Intel Desktop hardware gate	Run on physical Intel Desktop hardware with tuned Linux/BSD baseline plan and no unmeasured performance claims	⬜ Pending

Post-Full-OS CPU Implementation Backlog

CPU-specific implementation work starts after milestone 42. QEMU CPU profiles remain useful for compatibility and command-shape testing, but real performance claims require physical hardware and tuned Linux/BSD baselines.

ARM64 and ARM/NVIDIA Profiles

Profile	CPU type	QEMU support	QEMU matrix status	Hardware implementation status	Notes
Apple Silicon local smoke	host	yes, HVF	✅ Passing default smoke	🔵 Ready for hardware planning	Fast local correctness profile on the M3 development host.
ARMv8 weak baseline	cortex-a53	yes	✅ Passing boot probe	🔵 Ready for hardware planning	Minimum compatibility profile.
ARMv8 common baseline	cortex-a72	yes	✅ Passing boot probe	🔵 Ready for hardware planning	Portable AArch64 fallback profile.
Modern ARM client	cortex-a76	yes	⬜ Not in gate yet	⬜ Planned after Intel Desktop	Useful for newer non-server ARM behavior.
Newer ARM client	cortex-a710	yes	⬜ Not in gate yet	⬜ Planned after Intel Desktop	Useful for ARMv9-style compatibility planning.
ARM server baseline	neoverse-n1	yes	✅ Passing boot probe	⬜ Planned after Intel/Xeon	Graviton2-class approximation.
Modern ARM server	neoverse-n2	yes	✅ Passing boot probe	⬜ Planned after Intel/Xeon	Practical substitute for some newer ARM server behavior.
High-performance ARM server	neoverse-v1	yes	✅ Passing boot probe	⬜ Planned after Intel/Xeon	High-end ARM server feature path.
NVIDIA/Apple approximation	neoverse-v2	no local QEMU model	⚠️ Substitute required	⬜ Planned after Intel/Xeon	Use neoverse-n2, neoverse-v1, or max until hardware validation.
Future feature exposure	max	yes	✅ Passing boot probe	🔵 Ready for compatibility planning	Broad QEMU feature exposure.

Intel Desktop Profiles

Profile	CPU type	QEMU support	QEMU matrix status	Hardware implementation status	Notes
Conservative Intel Desktop	Skylake-Client	yes	✅ Passing smoke boot	✅ Milestones 43-48 QEMU path done	First x86_64 desktop compatibility profile.
Intended Intel Desktop target	AlderLake	no local QEMU model	✅ max stand-in dry-run	🔵 Placement policy next	Use max as the QEMU stand-in; validate on physical hardware.
Broad desktop feature exposure	max	yes	✅ Passing dry-run	🔵 Placement policy next	Compatibility stress profile, not a real CPU generation.

Intel Xeon and Server Profiles

Profile	CPU type	QEMU support	QEMU matrix status	Hardware implementation status	Notes
Conservative Xeon baseline	Skylake-Server	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	First server x86_64 compatibility profile.
Post-Skylake Xeon	Cascadelake-Server	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Useful for server feature-detection paths.
Xeon compatibility	Cooperlake	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Server feature coverage.
Modern Xeon baseline	Icelake-Server	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Newer server features and paging planning.
High-end Xeon	SapphireRapids	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	AMX/vector policy planning.
Future Xeon	GraniteRapids	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Forward compatibility.
Future Xeon	DiamondRapids	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Very new Intel server feature detection.
Dense-core Xeon	SierraForest	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Server E-core policy planning.
Dense-core Xeon	ClearwaterForest	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Forward dense-core compatibility.
Server-edge Intel Atom	Denverton	yes	⬜ Not in gate yet	⬜ Planned after Intel Desktop	Lower-power server/edge profile.
Server-edge Intel Atom	Snowridge	yes	⬜ Not in gate yet	⬜ Planned after Intel Desktop	Network-edge profile.
Broad server feature exposure	max	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Compatibility stress profile.

AMD x86_64 Profiles

Profile	CPU type	QEMU support	QEMU matrix status	Hardware implementation status	Notes
AMD EPYC baseline	EPYC	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Zen-era server compatibility.
AMD EPYC Rome	EPYC-Rome	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Zen 2 server compatibility.
AMD EPYC Milan	EPYC-Milan	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Zen 3 server compatibility.
AMD EPYC Genoa	EPYC-Genoa	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Zen 4 server compatibility.
AMD EPYC Turin	EPYC-Turin	yes	✅ Passing dry-run	⬜ Planned after Intel Desktop	Newer AMD server compatibility.

Current Rule

Milestones 43-48 are complete after make qemu-x86_64-smoke builds build/osai-x86_64.img, boots it through x86_64 OVMF in QEMU, and reaches the Intel Desktop serial markers for boot, IDT exceptions, memory-map parsing, page tables, timer/APIC discovery, and PCI discovery. Milestone 49 is the next implementation target. Xeon, AMD, and ARM/NVIDIA remain planned follow-on ports.

Related Pages

• QEMU Full OS Core Workdown
• QEMU CPU Test Matrix
• Hardware Readiness Gate
• Roadmap
• Implementation Plan
• Intel Desktop Port
• Intel Xeon Port
• ARM NVIDIA Port