QEMU CPU Test Matrix

QEMU CPU Test Matrix

Purpose

This page defines the QEMU CPU models OSAI should test against before moving from QEMU correctness work to hardware-specific ports.

QEMU CPU testing is for boot, feature-detection, exception, memory-management, userspace, driver, and telemetry correctness. It is not a hardware performance benchmark and must not be used for Linux, BSD, Intel, ARM, NVIDIA, or Apple Silicon speedup claims.

Contents

• Host QEMU Baseline
• Testing Policy
• ARM64 CPU Matrix
• x86_64 Desktop CPU Matrix
• x86_64 Server CPU Matrix
• Unsupported Requested Models
• Recommended Gate Tiers
• Command Examples
• Related Pages

Host QEMU Baseline

Current local toolchain checked on the Apple Silicon development host:

Tool	Path	Version
qemu-system-aarch64	/opt/homebrew/bin/qemu-system-aarch64	QEMU 11.0.1
qemu-system-x86_64	/opt/homebrew/bin/qemu-system-x86_64	QEMU 11.0.1

Apple Silicon can use AArch64 QEMU with HVF for fast local correctness testing. x86_64 QEMU on Apple Silicon uses emulation and is useful for compatibility and boot-shape testing only.

Important accelerator distinction:

• AArch64 HVF on this host accepts only a small CPU set: host, max, cortex-a53, and cortex-a57.
• Most named ARM CPU models listed by qemu-system-aarch64 -cpu help require OSAI_QEMU_ACCEL=tcg.
• The fast local smoke target should therefore use host with HVF.
• The broader ARM64 compatibility matrix should use TCG.

Testing Policy

• Keep host with HVF as the fast local ARM64 smoke target on Apple Silicon.
• Keep cortex-a72 with TCG as the portable ARM64 default when host-specific behavior should be avoided.
• Use max to expose the broadest QEMU-supported feature set for future-proof correctness testing.
• Use named Intel server/client models to prepare feature-detection code paths before real hardware work.
• Treat all QEMU results as correctness evidence only.
• Do not use QEMU CPU timing as performance evidence.

ARM64 CPU Matrix

CPU model	Supported by local QEMU	Accelerator	OSAI role	Notes
host	yes	HVF	Fast Apple Silicon local smoke target	Uses host CPU exposure with HVF where available.
cortex-a53	yes	HVF or TCG	Weak ARMv8 baseline	Good for minimum architectural compatibility.
cortex-a72	yes	TCG	Portable default ARM64 target	Common ARMv8 profile and current fallback default.
cortex-a76	yes	TCG	Modern ARM compatibility target	Useful before Neoverse-specific testing.
cortex-a710	yes	TCG	Newer client/mobile-class ARM target	Useful for ARMv9-style compatibility checks.
neoverse-n1	yes	TCG	ARM server baseline	Good Graviton2-class compatibility approximation.
neoverse-n2	yes	TCG	Modern ARM server target	Best local substitute for some newer server-class ARM behavior.
neoverse-v1	yes	TCG	High-performance ARM server target	Useful for high-end ARM server feature paths.
max	yes	HVF or TCG	Broad feature exposure target	Useful to catch feature-detection assumptions.

Initial ARM64 QEMU gate targets:

1. host
2. cortex-a53
3. cortex-a72
4. neoverse-n1
5. neoverse-n2
6. neoverse-v1
7. max

x86_64 Desktop CPU Matrix

CPU model	Supported by local QEMU	OSAI role	Notes
Skylake-Client	yes	Conservative Intel Desktop compatibility	Good first client-class x86_64 profile.
AlderLake	no	Intended Intel Desktop hardware profile	Use an OSAI compatibility profile until QEMU gains native support.
SapphireRapids	yes	Feature-rich Intel profile	Server-class CPU, but useful for broad Intel feature detection.
max	yes	Broad x86_64 feature exposure target	QEMU exposes all features supported by the current accelerator.

Recommended QEMU desktop profile mapping:

OSAI profile	QEMU CPU model	Reason
intel-desktop-conservative	Skylake-Client	Stable baseline for x86_64 client boot paths.
intel-desktop-alderlake-compat	max	Best available local compatibility stand-in for Alder Lake-style feature exposure.

The intel-desktop-alderlake-compat profile is not a real Alder Lake emulation model. Real Alder Lake support must be validated on physical Intel Desktop hardware later.

x86_64 Server CPU Matrix

CPU model	Supported by local QEMU	OSAI role	Notes
Skylake-Server	yes	Conservative Xeon baseline	Good first server-class boot and feature-detection target.
Icelake-Server	yes	Modern Xeon baseline	Useful for newer server feature paths.
SapphireRapids	yes	Current high-end Xeon target	Important for AMX/vector-policy planning.
GraniteRapids	yes	Future Xeon target	Useful for forward compatibility.
max	yes	Broad x86_64 feature exposure target	Useful for feature-detection stress testing.

Unsupported Requested Models

Requested model	Status	Practical substitute
neoverse-v2	Not listed by local QEMU 11.0.1	neoverse-n2, neoverse-v1, or max
AlderLake	Not listed by local QEMU 11.0.1	max for compatibility exposure, Skylake-Client for conservative client baseline

Unsupported QEMU models should not block OSAI planning. They should become named OSAI platform profiles with explicit substitute QEMU models and later physical-hardware validation requirements.

Recommended Gate Tiers

Tier	Purpose	CPU models
Fast local smoke	Run frequently during QEMU development	host with HVF, optionally max with HVF
ARM64 compatibility	Validate AArch64 boot and kernel assumptions	cortex-a53, cortex-a72, neoverse-n1, neoverse-n2, neoverse-v1, max with TCG
x86_64 compatibility	Prepare non-performance x86_64 boot path work	Skylake-Client, Skylake-Server, Icelake-Server, SapphireRapids, GraniteRapids, max
Release gate	Run before declaring a QEMU readiness milestone	ARM64 compatibility plus x86_64 command/build checks

Command Examples

ARM64 examples:

OSAI_QEMU_CPU=host make qemu-smoke
OSAI_QEMU_CPU=max make qemu-smoke
OSAI_QEMU_ACCEL=tcg OSAI_QEMU_CPU=cortex-a53 make qemu-smoke
OSAI_QEMU_ACCEL=tcg OSAI_QEMU_CPU=cortex-a72 make qemu-smoke
OSAI_QEMU_ACCEL=tcg OSAI_QEMU_CPU=neoverse-n1 make qemu-smoke
OSAI_QEMU_ACCEL=tcg OSAI_QEMU_CPU=neoverse-n2 make qemu-smoke
OSAI_QEMU_ACCEL=tcg OSAI_QEMU_CPU=neoverse-v1 make qemu-smoke
OSAI_QEMU_ACCEL=tcg OSAI_QEMU_CPU=max make qemu-smoke

x86_64 command-shape examples:

OSAI_QEMU_X86_CPU=Skylake-Client ./scripts/run-qemu-x86_64.sh --dry-run
OSAI_QEMU_X86_CPU=Skylake-Server ./scripts/run-qemu-x86_64.sh --dry-run
OSAI_QEMU_X86_CPU=Icelake-Server ./scripts/run-qemu-x86_64.sh --dry-run
OSAI_QEMU_X86_CPU=SapphireRapids ./scripts/run-qemu-x86_64.sh --dry-run
OSAI_QEMU_X86_CPU=GraniteRapids ./scripts/run-qemu-x86_64.sh --dry-run
OSAI_QEMU_X86_CPU=max ./scripts/run-qemu-x86_64.sh --dry-run

The x86_64 commands currently validate command construction and CPU-model availability. They do not yet prove a full x86_64 OSAI boot path.

Related Pages

• QEMU on macOS
• Hardware Readiness Gate
• Intel Desktop Port
• Intel Xeon Port
• ARM NVIDIA Port
• Testing and Benchmarking