i8fp8 fmha gfx950/942 asm - #3186
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| def flash_attn_i8fp8_pertensor_func( |
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why we need new python api..
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I tried to minimize changes to existing logic on this PR, and leave those for a holistic refactor later, but yes in this case flash_attn_fp8_pertensor_func could have been reused with minimal intrusion
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but even then, I find the duplication less severe than making the fp8 wrapper dispatch Sage-like i8f8, when the later doesn't fall back to flash_attn_func_v3_triton().
| # FP8 ASM kernels assemble the GQA-shift from a fixed log2 table | ||
| # (1,2,4,8,16); arbitrary divisor ratios route to CK. | ||
| if is_fmha_v3_fp8(): | ||
| if is_fmha_v3_fp8() or is_fmha_v3_i8fp8(): |
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That is a lot of code duplication. Why not having a single function that takes tensor types to check against as an argument ?
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The whole AITER mha API is long due for a refactor, precisely so different Q/K/V/O dtypes combinations can go through with minimal code duplication. However in this PR I tried to keep my changes to a minimum, thus introducing temporal duplication. My proposal is to refactor after the mxfp4 and mxfp6 attention variants have also merged, to minimize the chances of breaking something (like e.g here )
Motivation
fp8FMHA delivers large speedups overbf16, but its precision is insufficient for diffusion models — the quantization error shows up as visible artifacts in generated images and videos.This PR adds a Sage-like
i8fp8FMHA (int8 Q/K, fp8 V, bf16 output) as a middle point betweenbf16andfp8. It is more precise than fp8 (enough to prevent artifacts) while running faster than bf16, about 95% of fp8 performance.Technical Details
New asm FMHA forward kernel for head-dim 128 on gfx950 (MI350) and gfx942 (MI300):
q/k/v_descale(float32) applied on the descale path.q,k = int8andv = fp8) — no new API surface or override flag is required. The newdata_typestring"i8fp8bf16"threads through the existing v3 dispatch:csrc/py_itfs_cu/asm_mha_fwd.cu— detectsis_i8fp8, validates q/k(int8) and v(fp8) dtypes and the descale tensors, and forces a bf16 output.csrc/cpp_itfs/mha_fwd.cu— setsin_bpe = 1, wires the descale pointers, and admitsi8fp8bf16through the v3 support guard.hsa/gfx950/.../fmha_fwd.csvandhsa/gfx942/.../fmha_fwd.csv— one lookup row each pointing at the newfwd_hd128_i8fp8.cokernel.flash_attn_i8fp8_pertensor_func(q, k, v, q_descale, k_descale, v_descale, ...)inaiter/ops/mha.py, plus anis_fmha_v3_i8fp8()gate in_flash_attn_forward.Note: causal and grouped variants could be generated if useful for othe rusers
Test Plan
Benchmarked and accuracy-checked via
op_tests/op_benchmarks/triton/bench_sage.py, which was extended with anaiter_i8fp8runner, a transformer-like input distribution, QK rotation/clipping for better quantized quality, and a refactored accuracy-metrics report (cosine similarity against the bf16 and Sage references):Test Result
Submission Checklist