Pinned Loading

1. ECE552-5-Stage-Pipelined-Processor ECE552-5-Stage-Pipelined-Processor Public

   Forked from hmrdo/5-Stage-Pipelined-Processor

   ECE 552 - 5 Stage pipelined processor with forwarding, branch prediction and I/D caches

   Verilog 1

2. 128bitFeistelCipher-ASIC 128bitFeistelCipher-ASIC Public

   128-bit Streaming 6‑Round Feistel Cipher — RTL to ASIC

   Verilog

3. ECE554-Capstone-Project ECE554-Capstone-Project Public

   Forked from hmrdo/ECE554-Capstone-Project

   FPGA based real time object tracking system

   Verilog 1

4. Pathfinder-FPGA-robot Pathfinder-FPGA-robot Public

   Fully realized pathfinder robot on FPGA with PID, motor drivers, sensors, etc using SystemVerilog

   SystemVerilog 1 2

5. Matrix-Multiplication-Module Matrix-Multiplication-Module Public

   ECE 554 Matrix multiplication module implemented on a FPGA

   SystemVerilog

6. Multi-Layer-Perceptron Multi-Layer-Perceptron Public

   End-to-end full-custom design of a multi-layer perceptron: schematics, layout, and verification

   SourcePawn