rmp: Multi output gates not supported

[antonblanchard]

If either a gate level design or tech mapped design (eg adder cell mapping) has multi-output gates, rmp fails:

Warning: Detected 1 multi-output gates (for example, "FAx1_ASAP7_75t_R").
** cmd error: aborting 'source ./results/asap7/multiply_add_64x64/base/0ord_abc_script.tcl'
./results/asap7/multiply_add_64x64/base/multiply_add_64x64_crit_path.blif (line 9186): Mismatch in the fanins of gate "FAx1_ASAP7_75t_R".

Yosys looks to solve this by replacing the BLIF format with AIGER/XAIGER, which does support multiple outputs.

[maliberty]

rmp is not production worthy so this is the least of the problems but something to consider when we work on it further