Why Use the DE2 115
There were a few different FPGAs considered for this project. The two best options were the Altera DE2-115 and a Xilinx Zedboard. Although the Zedboard had more memory for a frame buffer, it has no video input. Without a video input, it would have been difficult to generate an interesting video signal on the FPGA. The DE2-115 board, with its composite video input allowed me to connect a Nintendo Entertainment System so that I could demonstrate the frame buffer with a moving image.
The Zedboard uses a Xilinx Zynq-7000 All Programmable SoC. This chip includes an ARM processor and user programable logic. The Zedboard has a similar area dedicated to programable logic and more memory than the DE2-115 which would have made it a good platform for demonstrating a frame buffer. With its extra memory and programable logic, this board had all of the necessary components except for the video input. Because there was not video input it would have been difficult to generate and interesting signal to store in the buffer and output to a monitor.
This board was quickly ruled out because the Zedboard is generally better and had more resources available.
Altera's DE2-115 FPGA development board has about 115,000 logic elements and roughly 500kB of on chip memory. At 640 x 480 8bit pixels the frame buffer must be at least 300kB to hold a single frame. The DE2-115 has enough on chip memory to store an entire frame and a composite video input to accept a video signal. Therefor, the DE2-115 was chosen to implement the frame buffer.
