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Summary

This PR improves code clarity by renaming the STACK_ALIGNMENT macro to STACKFRAME_ALIGN throughout the codebase. The new naming better reflects the actual purpose of the macro (frame alignment) while maintaining backward compatibility. Additionally, this PR introduces support for TLS stack alignment with separate STACK_ALIGNMENT and STACKFRAME_ALIGN definitions to support different alignment requirements.

Changes Made

  • Rename STACK_ALIGNMENT to STACKFRAME_ALIGN in all architecture-specific irq.h files
  • Update all references to use STACKFRAME_ALIGN macros (STACKFRAME_ALIGN_UP/DOWN/MASK)
  • Create separate STACK_ALIGNMENT macro for TLS alignment when CONFIG_TLS_ALIGNED is enabled
  • Add STACKFRAME_ALIGN_UP, STACKFRAME_ALIGN_DOWN, STACKFRAME_ALIGN_MASK macros
  • Maintain backward compatibility with STACK_ALIGN_* macros for existing code
  • Update architecture sources across 18+ architectures (ARM, ARM64, RISC-V, x86, x86_64, etc.)

Impact

• Code Quality: Improved macro naming for better code comprehension
• Functionality: Enables independent TLS and frame stack alignment configurations
• Compatibility: Backward compatible with existing STACK_ALIGN_* macros
• Consistency: Uniform naming convention across all supported architectures
• Flexibility: Supports different alignment strategies for TLS vs frame operations

Testing

Test Environment:

• Host: Linux x86_64
• Board: sim, qemu-armv7a (with SMP), and multiple architecture simulators
• Configuration: Multiple board configurations with and without CONFIG_TLS_ALIGNED

Test Procedure:

  1. Tested stack alignment on all supported architectures
  2. Verified STACKFRAME_ALIGN macros work correctly on each platform
  3. Tested with CONFIG_TLS_ALIGNED enabled and disabled
  4. Verified kernel stack alignment with new macro names
  5. Tested interrupt stack allocation and alignment
  6. Verified backward compatibility with existing STACK_ALIGN_* macros
  7. Tested SMP configurations with proper stack alignment

Test Results:

Tested Architectures:

  • ARM (Cortex-A, Cortex-R)
  • ARM64
  • RISC-V (multiple variants)
  • x86/x86_64
  • SPARC, TriCore, Xtensa, Z80, Z16
  • Simulator (SIM)

Stack Alignment Verification:

  • ✅ STACKFRAME_ALIGN correctly applied across all architectures
  • ✅ TLS alignment independently configurable
  • ✅ Interrupt stacks properly aligned
  • ✅ Kernel stacks properly aligned
  • ✅ SMP stack allocation working correctly

Verification:

• ✅ All architectures using STACKFRAME_ALIGN correctly
• ✅ TLS alignment support properly implemented
• ✅ Backward compatibility maintained for STACK_ALIGN_* macros
• ✅ Consistent naming convention across codebase
• ✅ Interrupt stack allocation and alignment verified
• ✅ No regressions in stack operations
• ✅ OSTest passed on all tested boards

Related Issues

Improves code clarity and enables flexible stack alignment configuration in NuttX across all supported architectures.

@github-actions github-actions bot added Arch: arm Issues related to ARM (32-bit) architecture Arch: arm64 Issues related to ARM64 (64-bit) architecture Arch: avr Issues related to all AVR(8-bit or 32-bit) architectures Arch: ceva Issues related to CEVA architecture Arch: hc Issues related to HC architecture Arch: mips Issues related to the MIPS architecture Arch: openrisc Issues related to the OpenRISC architecture Arch: renesas Issues related to the Renesas chips Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Arch: simulator Issues related to the SIMulator Arch: sparc Issues related to the SPARC architecture Arch: tricore Issues related to the TriCore architecture from Infineon Arch: x86 Issues related to the x86 architecture Arch: x86_64 Issues related to the x86_64 architecture Arch: xtensa Issues related to the Xtensa architecture Arch: z16 Issues related to the Z16 architecture labels Jan 20, 2026
@github-actions github-actions bot added Arch: z80 Issues related to the Z80 architecture Area: OS Components OS Components issues Board: arm Size: M The size of the change in this PR is medium labels Jan 20, 2026
@xiaoxiang781216
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@hujun260 please fix the conflict

@hujun260 hujun260 force-pushed the apache_arch_Make_STACK_ALIGNMENT branch from 25146ad to 7313ba2 Compare January 21, 2026 05:30
@hujun260 hujun260 force-pushed the apache_arch_Make_STACK_ALIGNMENT branch from 7313ba2 to 0cde74d Compare January 21, 2026 06:33
@hujun260
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@hujun260 please fix the conflict

done

…ures

Rename STACK_ALIGNMENT macro to STACKFRAME_ALIGN throughout the codebase
to provide clearer naming semantics. The new name better reflects the macro's
purpose of frame alignment rather than general stack alignment.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
@GUIDINGLI GUIDINGLI merged commit 6f03601 into apache:master Jan 22, 2026
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Arch: arm Issues related to ARM (32-bit) architecture Arch: arm64 Issues related to ARM64 (64-bit) architecture Arch: avr Issues related to all AVR(8-bit or 32-bit) architectures Arch: ceva Issues related to CEVA architecture Arch: hc Issues related to HC architecture Arch: mips Issues related to the MIPS architecture Arch: openrisc Issues related to the OpenRISC architecture Arch: renesas Issues related to the Renesas chips Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Arch: simulator Issues related to the SIMulator Arch: sparc Issues related to the SPARC architecture Arch: tricore Issues related to the TriCore architecture from Infineon Arch: x86 Issues related to the x86 architecture Arch: x86_64 Issues related to the x86_64 architecture Arch: xtensa Issues related to the Xtensa architecture Arch: z16 Issues related to the Z16 architecture Arch: z80 Issues related to the Z80 architecture Area: OS Components OS Components issues Board: arm Size: M The size of the change in this PR is medium

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