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9 changes: 8 additions & 1 deletion arch/arm/src/stm32h5/stm32_qspi.c
Original file line number Diff line number Diff line change
Expand Up @@ -921,8 +921,15 @@ static int qspi_setupxctnfrommem(struct qspi_xctnspec_s *xctn,
{
xctn->datamode = CCR_DMODE_DUAL;
}
else if (QSPIMEM_ISQUADIO(meminfo->flags))
else if (QSPIMEM_ISQUADIO(meminfo->flags) ||
QSPIMEM_ISQUADDATA(meminfo->flags))
{
/* QUADDATA selects quad data width while leaving the address phase
* single-line (1-1-4), which QUADIO cannot express. The address-mode
* block above intentionally ignores QUADDATA, so addrmode stays
* single.
*/

xctn->datamode = CCR_DMODE_QUAD;
}
else
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24 changes: 22 additions & 2 deletions drivers/mtd/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -1393,19 +1393,39 @@ config W25_DEBUG
endif # MTD_W25

config MTD_GD25
bool "SPI-based GD25 FLASH"
bool "SPI/QuadSPI-based GigaDevice GD25 FLASH"
default n
select SPI

if MTD_GD25

config GD25_QSPI
bool "Use QuadSPI interface for GD25"
default n
select QSPI
---help---
Enable to use the QuadSPI (QSPI) interface instead of SPI.
When enabled, gd25_initialize() accepts a qspi_dev_s pointer
and bool unprotect. When disabled (default), SPI is used.

config GD25_SPIMODE
int "GD25 SPI Mode"
default 0
depends on !GD25_QSPI

config GD25_SPIFREQUENCY
int "GD25 SPI Frequency"
default 20000000
depends on !GD25_QSPI

config GD25_QSPIMODE
int "GD25 QuadSPI Mode"
default 0
depends on GD25_QSPI

config GD25_QSPIFREQUENCY
int "GD25 QuadSPI Frequency"
default 20000000
depends on GD25_QSPI

config GD25_READONLY
bool "GD25 Read-Only FLASH"
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