k3: fit am62p/am62-lp R5 SPL into SRAM (GCC 13 + per-SoC size handling), fix tispl rename & u-boot artifact hashing - #10237
k3: fit am62p/am62-lp R5 SPL into SRAM (GCC 13 + per-SoC size handling), fix tispl rename & u-boot artifact hashing#10237igorpecovnik wants to merge 2 commits into
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📝 WalkthroughWalkthroughUpdates K3 boot generation with R5 tiboot3 configuration fixups for selected AM62x targets and guards optional ChangesK3 boot build handling
Estimated code review effort: 3 (Moderate) | ~20 minutes Possibly related PRs
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In `@config/sources/families/include/k3_common.inc`:
- Around line 141-143: Update the artifact-copy logic in the surrounding hook so
missing TISPL_FILE or UBOOT_FILE sources remain successful, but failures from cp
for existing sources propagate to the caller. Remove the unconditional success
behavior from the hook’s final return path and ensure both copy commands
preserve their nonzero status.
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config/sources/families/include/k3_common.inc
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@jonaswood01 @glneo Can you guys take a look? SK-AM62-LP binary is still too big even with the PR for some reason when I built it w/this PR (0x31074) I think YMODEM is also required for UART boot so it wouldn't fly for Test farm. |
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The R5 first-stage SPL (tiboot3) for am62p and am62-lp overran CONFIG_SPL_SIZE_LIMIT on the Trixie toolchain (GCC 14) and newer TI u-boot. Fix it per-SoC in compile_k3_bootgen(): - Build the R5 SPL with GCC 13; GCC 14 emits oversized code. Fail early if arm-linux-gnueabi-gcc-13 is absent rather than silently falling back to the default compiler and reintroducing the overflow. - am62p (AM62P5): the SoC has ~0xE7f0 of MCU SRAM headroom above the limit (early stack pointer at base+0x4a7f0, BSS at base+0x4b000, but SPL_SIZE_LIMIT only 0x3C000). Raise SPL_SIZE_LIMIT to 0x40000 and SPL_MAX_SIZE to 0x3F000 and build for size (-Os). No boot paths removed. - am62-lp (AM625): SPL_SIZE_LIMIT (0x3A7F0) already sits at the stack pointer with BSS immediately above -- no SRAM to raise into -- so shrink the image. Armbian boots tiboot3 from SD/eMMC-FAT only, so drop the unused SPI-NOR and SPI-NAND/MTD boot stacks am62x_lpsk adds over am62x_evm, and build for size (-Os). Only the R5 first stage is affected; the A53 SPL and u-boot proper are untouched. Also make the tispl/u-boot output rename robust to renamed and same-file binman outputs on newer u-boot (mainline 2026.07 / recent TI SDK), which otherwise trip Armbian's ERR trap. Signed-off-by: Igor Pecovnik <igor@armbian.com>
The computed u-boot artifact version did not change when the K3 first-stage build functions (compile_k3_bootgen / compile_k3_optee) were edited, so cached artifacts could survive across meaningful changes to the R5 SPL / OP-TEE build recipe. Add both functions to the list hashed into the version. calculate_hash_for_function_bodies skips functions that don't exist, so listing these K3-specific builders is a no-op for other families. Signed-off-by: Igor Pecovnik <igor@armbian.com>
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Fixes the K3
am62p/am62-lpu-boot builds that were failing across all vendor branches (vendor,vendor-rt,vendor-edge) plus mainlineedge— the R5 first-stage SPL overflowing its SRAM size limit, and the tispl/u-boot rename breaking on newer u-boot. Touches two files:config/sources/families/include/k3_common.incandlib/functions/artifacts/artifact-uboot.sh. The R5 stage builds with soft-floatgcc-13-arm-linux-gnueabi, already present in the framework image (armbian/docker-armbian-build#37, merged).1. R5 SPL overruns its SRAM size limit → GCC 13 + per-SoC size handling
The R5 first-stage SPL (tiboot3) for am62p and am62-lp overruns
CONFIG_SPL_SIZE_LIMIT:Two forces push it over: GCC 14 (the Trixie default) produces larger SPL code than TI validated, and the newer TI vendor trees (
ti-u-boot-2026.01, TI SDK12.00.00.07) grew the SPL. GCC 13 is necessary but not sufficient on its own, socompile_k3_bootgencombines it with a size remedy chosen per SoC.Compiler: the R5 stage is built with
CC=arm-linux-gnueabi-gcc-13(u-boot Kbuild honours a command-lineCC;CROSS_COMPILEstays for binutils). PassingCCexplicitly means no silent fallback — an early-dumpversioncheck asserts the major version is13and fails loudly otherwise, rather than reverting to gcc-14 and reintroducing the overflow. Only the R5 first stage changes compiler; the A53 SPL and u-boot proper are untouched.The two SoCs need different size remedies because their MCU SRAM layout differs:
SPL_SIZE_LIMIT0x4a7f00x4b0000x3C000-Os0x3a7f00x3b0000x3A7F0-OsSPL_SIZE_LIMIT0x3C000→0x40000andSPL_MAX_SIZE0x3B000→0x3F000(both stay well below the stack pointer) and build for size (-Os). No boot paths are removed — SPI-NOR and SPI-NAND stay intact.am62x_lpskadds overam62x_evm(SPL_SPI_FLASH*,DM_SPI_FLASH,SPI_FLASH_*,SPL_MTD*,SPL_NAND_SPI_SUPPORT,MTD_SPI_NAND,DM_MTD,SPL_YMODEM_SUPPORT) and build for size (-Os).olddefconfigcascades the dependencies.Note
The am62-lp change removes SPI-NAND/SPI-NOR boot support from that board's tiboot3 — dead weight for Armbian's SD/eMMC images, but a capability change. @jonaswood01 (board maintainer): flag if you need am62-lp to boot from SPI-NAND.
2. tispl/u-boot rename breaks on newer u-boot (beagleplay & other GP boards)
post_uboot_custom_postprocess__update_uboot_namescopied a board's override image (TISPL_FILE/UBOOT_FILE) ontotispl.bin/u-boot.img. Newer u-boot broke this two ways, each tripping Armbian'sERRtrap:ti-spl_unsigned.fit.*; the old*_unsignedfiles no longer exist, socp <absent>failed (brokebeagleplay-{edge,vendor,vendor-rt}, sk-tda4vm, beaglebone-ai64);*_unsignedimage andtispl.binthe same file, socp src dsterrors "are the same file".Fix: guard each copy on the file existing (an
if, since[[ -f x ]] && cpreturns 1 when absent and would itself trap) and keep|| trueso a same-file copy is tolerated. When skipped, binman's standardtispl.bin/u-boot.imgis left in place. (nounsetis off, so this is not an unbound-var issue.)3. u-boot artifact hash now tracks the K3 recipe
The u-boot artifact version hashes specific hook/function bodies, but
compile_k3_bootgen/compile_k3_opteeweren't among them — the hashedpre_config_uboot_targethook only calls them. So changing the R5 recipe (e.g. the GCC 13 switch and size handling above) didn't change the artifact hash and a stale cached u-boot was reused. Add both tocalculate_hash_for_function_bodies; it skips functions that don't exist, so non-K3 families are unaffected (K3 boards rebuild once, then track correctly).Testing
All affected u-boot artifacts compile once the gcc-13 image is live; the size remedies were verified against CI run 30202614279 (the pre-fix R5 overflow of
0x1c8a–0x1dfeon am62p and0xe88–0xfe0on am62-lp).A card boot smoke test is still needed before merge — to confirm the raised-limit am62p R5 SPL boots, and that am62-lp boots from SD/eMMC with the SPI-NOR/SPI-NAND stacks stripped.