test: <arrest> and <sample> have no conveyor corpus fixture (proto/XMILE round-trip untested)

[bpowers]

<arrest> (conveyors.md section 4.3 step 0 -- an arrested belt holds its exit and admits nothing) and <sample> (section 6.1 -- the mid-run transit re-latch gate) have no integration-corpus fixture under test/conveyors/. They are covered only by unit tests:

• src/simlin-engine/src/wasmgen/belt_tests.rs -- VM-vs-wasm slab parity over synthetic XMILE built from in-test format! strings
• src/simlin-engine/src/conveyor_tests.rs -- VM behavior

Why it matters

As of #924, src/simlin-engine/tests/integration/simulate.rs runs every test/conveyors/ fixture through simulate_special_path, which gates the VM, the protobuf round-trip, the XMILE round-trip, and the wasm blob against each other column-for-column.

The unit tests construct their XMILE in-process, so they never exercise the protobuf or XMILE round-trip. A writer or proto-serializer that silently dropped <arrest> or <sample> would not be caught by any test in the repo. That is exactly the class of hole #924's new fixtures (leaks+zones, container access, discrete admission + in_limit, queue coupling) were added to close. Arrest and sample are what remain.

Also uncovered by any corpus fixture, same reasoning, lower priority (all unit-covered in belt_tests.rs only):

• exponential_leak="true" (section 5.2)
• <leak_integers/> (section 5.4) -- note the interaction with engine: <leak_integers/> is silently ignored on an exponential-leak conveyor #942 and conveyor-engine: an integer leak flow into an ARRESTED destination belt can still deliver whole units #947
• the section 7.2 explicit per-slat init list
• a time-varying <len> (belt grow/shrink, section 6.2)

Components

src/simlin-engine (XMILE reader/writer, protobuf serializer, conveyor pass, wasmgen belt pass), test/conveyors/.

Suggested approach

Add one or two small hand-authored .xmile fixtures under test/conveyors/ -- e.g. an arrested/sampled belt with a time-varying <len>, and possibly an exponential + integer-leak belt. For each:

1. Add it to the CONVEYOR_CORPUS_FIXTURES list in src/simlin-engine/tests/integration/simulate.rs with one simulate_special_path test.
2. Note it in test/conveyors/README.md (and drop the prose caveat at the bottom, quoted below).

No expected-output CSV is needed -- the VM is the oracle for that harness.

The conveyor_fixture_directory_is_fully_accounted_for test added by #924 already forces every model file in the directory onto either CONVEYOR_CORPUS_FIXTURES or the explicitly-blocked list, so dropping a file in without wiring it will fail rather than silently pass.

Keep the fixtures tiny: cargo test --workspace runs under a hard 3-minute wall-clock cap in pre-commit and CI.

How it was discovered

Identified while implementing #924 on branch conveyor-engine. #924 closed several conveyor corpus-coverage gaps and left this one open. It is currently documented in prose at the bottom of test/conveyors/README.md:

<arrest> and <sample> still have no corpus fixture, only unit coverage in wasmgen/belt_tests.rs and conveyor_tests.rs.

Documented is not tracked; hence this issue.