Caliptra Subsystem Gen 2.0 Release v1p0

Official Caliptra Subsystem Gen 2.0 Release v1p0

This release includes feedback on the release candidate from Caliptra Community.

Overview

Release for Caliptra Subsystem Gen 2.0 RTL, version 1p0. All features are frozen, verification plans are executed and signed-off, documentation has been updated, and CDC, Lint, RDC, Synthesis runs are clean.

Release Notes

What's Changed

• [VAL] Remove FIXMEs by @clayton8 in #415
• [DOC] Mention MCU MBOX SRAM accesses must be DWORD accesses by @clayton8 in #413
• [VAL] Test fixes for MCI Register Validation by @anjpar in #423
• [DOC] Spec clarifications by @clayton8 in #425
• [VAL] Fix randomization for mask select and SVA conditions by @upadhyayulakiran in #417
• [RTL] I3C Core rev update to tag v1p1 by @nileshbpat in #424
• [ENV] Kick off JTAG tests in parallel by @clayton8 in #434
• [DOC] Open test plan permissions; clarify SRAM requirement in spec by @calebofearth in #431
• [ENV] Remove submit JTAG script and add new JTAG TL by @clayton8 in #445
• [DOC] Fix issue Question regarding clock frequency #426 by @nileshbpat in #450
• [VAL] Add MCI cacheable test-case (not included in regr yet); tweak some C lib behavior by @calebofearth in #449
• [DOC] Add clarification on AXI DMA routes to SS HW spec by @calebofearth in #456
• [VAL] Minor fixes for MCI register tests by @anjpar in #460
• [DOC] Fix markdown syntax issue in HW spec by @calebofearth in #468
• [DOC] Add FIPS zeroization to generic input wires by @clayton8 in #473
• [DOC] Fix broken hyperlink in SS integration spec by @calebofearth in #469
• [DOC] Clarify AXI interconnect requirements in SS integration spec by @calebofearth in #477
• [fuse_ctrl, tools] Include pyyaml in requirements.txt by @andrea-caforio in #471
• [fuse_ctrl, test] Generate mmap header for testsuite by @andrea-caforio in #466
• GH Issue fixes by @nileshbpat in #480
• [TB] Coverage Dashboard Draft and test addition by @nileshbpat in #494
• Link update to coverage draft by @nileshbpat in #496
• User/ekarabulut/otp optional items by @ekarabu in #483
• [VAL][SVA] MCI Register test fixes and WDT Timer assertions fix by @anjpar in #497
• [TB] Add missing MCI coverage by @clayton8 in #500
• [SPEC] Update CSS memory map by @clayton8 in #522
• [Cov] Added Caliptra SS coverage updates by @nileshbpat in #526
• [RTL] Fix coverage miss bug due to missing parentheses by @anjpar in #529
• [RTL] Expose I3C SB signals for external I3C bypass boot, connect scan_mode to MCU, and spec updates by @clayton8 in #537
• [RTL] Fix MCU scan mode by @clayton8 in #553
• [DOC][VAL] Disconnect MCU ROM wr path in TB; clarify MCU ROM if connection req and SRAM error handling sections by @calebofearth in #550
• [DOC] Add Caliptra Core coverage analysis by @calebofearth in #543
• Coverage updates and fixed gh484 by @nileshbpat in #565
• [Cov] Coverage Doc Updates by @nileshbpat in #574
• [fuse_ctrl] Word-align fuse addresses by @andrea-caforio in #548
• [RTL] Expose RDC Related Signals 2.0 by @clayton8 in #580
• [VAL] Fix incorrect pointer in mci FW test by @anjpar in #573
• [BUG FIX] Drive a_data with zeroes for reads instead of wdata, which may be arbitrary by @calebofearth in #590
• pointed caliptra_v_2_0_1 branch by @ekarabu in #612
• [VAL] Update testbench to exercise SHA accelerator endian-swap feature in streaming mode by @calebofearth in #544
• [RTL] Update I3C Submodule and Add connections for cio_test* signals by @nileshbpat in #629

Full Changelog: css-gen2-v1.0-rc2...css-gen2-v1.0