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I'm trying to understand the intended software architecture when integrating the Caliptra MCU Subsystem.
My understanding is:
In a Caliptra Core-only deployment, an application processor can use
libcaliptra and communicate directly with the Caliptra mailbox.
In the Caliptra MCU Subsystem documentation, the MCI mailbox is described
as the primary SoC-to-MCU interface and many Caliptra services
(attestation, certificates, crypto services, etc.) are exposed through MCU
mailbox commands.
What is not clear to me is whether, in a subsystem deployment, the
application processor is still expected to access Caliptra Core directly
through libcaliptra, or whether all access should be routed through the MCU
using the MCI mailbox APIs.
where the MCU is the sole owner of the Caliptra mailbox interface?
Related question:
The DPE documentation mentions an SPDM responder executing on the SoC
application processor in "passive mode". In that deployment model, is the
SPDM responder expected to use libcaliptra directly, or can/should it obtain
DPE services via the MCU mailbox interface?
One additional point of confusion is measurement/PCR access.
In the Caliptra Core architecture, measurements/PCRs are a central part of
attestation and are accessible through the Caliptra mailbox interface.
However, when looking at the MCU Subsystem external mailbox commands, I do not
see an obvious mechanism for retrieving PCR values or measurement register
state.
Is the expectation that:
The host accesses PCRs directly through the Caliptra mailbox (e.g.
via libcaliptra), even in subsystem deployments?
The MCU is expected to expose PCR/measurement state through MCI mailbox
commands?
PCRs are intentionally abstracted away, with hosts expected to consume
only attestation artifacts (DPE/attestation reports) rather than raw PCRs?
Understanding the intended PCR access model would also help clarify whether
the MCU is intended to be the sole external interface to Caliptra services in
subsystem mode. I'm mainly trying to understand the intended ownership and access model for
Caliptra services in subsystem mode.
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I'm trying to understand the intended software architecture when integrating the Caliptra MCU Subsystem.
My understanding is:
In a Caliptra Core-only deployment, an application processor can use
libcaliptra and communicate directly with the Caliptra mailbox.
In the Caliptra MCU Subsystem documentation, the MCI mailbox is described
as the primary SoC-to-MCU interface and many Caliptra services
(attestation, certificates, crypto services, etc.) are exposed through MCU
mailbox commands.
What is not clear to me is whether, in a subsystem deployment, the
application processor is still expected to access Caliptra Core directly
through libcaliptra, or whether all access should be routed through the MCU
using the MCI mailbox APIs.
In other words, is the intended architecture:
Option A:
Application Processor
|
libcaliptra
|
Caliptra Mailbox
|
Caliptra Core
and separately
Application Processor
|
MCI Mailbox
|
MCU
or
Option B:
Application Processor
|
MCI Mailbox
|
MCU
|
Caliptra Core
where the MCU is the sole owner of the Caliptra mailbox interface?
Related question:
The DPE documentation mentions an SPDM responder executing on the SoC
application processor in "passive mode". In that deployment model, is the
SPDM responder expected to use libcaliptra directly, or can/should it obtain
DPE services via the MCU mailbox interface?
One additional point of confusion is measurement/PCR access.
In the Caliptra Core architecture, measurements/PCRs are a central part of
attestation and are accessible through the Caliptra mailbox interface.
However, when looking at the MCU Subsystem external mailbox commands, I do not
see an obvious mechanism for retrieving PCR values or measurement register
state.
Is the expectation that:
The host accesses PCRs directly through the Caliptra mailbox (e.g.
via libcaliptra), even in subsystem deployments?
The MCU is expected to expose PCR/measurement state through MCI mailbox
commands?
PCRs are intentionally abstracted away, with hosts expected to consume
only attestation artifacts (DPE/attestation reports) rather than raw PCRs?
Understanding the intended PCR access model would also help clarify whether
the MCU is intended to be the sole external interface to Caliptra services in
subsystem mode. I'm mainly trying to understand the intended ownership and access model for
Caliptra services in subsystem mode.
Thanks for any clarification.
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