Ensure past intrinsics are emitted with an explicit clock

[TaoBi22]

Slight modification to the intrinsic introduced by #5260 to ensure explicit clocks are always emitted - this is so we can avoid relying on implicit clock inference from IR in CIRCT (relevant CIRCT PR).

First time Chisel contributor so please let me know if I've missed anything!

AI-assisted-by: Claude Code: claude-sonnet-4.6

CC: @fabianschuiki

Contributor Checklist

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Type of Improvement

• Backend code generation

Desired Merge Strategy

• Squash: The PR will be squashed and merged (choose this if you have no preference).

Release Notes

Emitted past intrinsics are now always emitted with explicit clocks.

Reviewer Checklist (only modified by reviewer)

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• ✅ login: jackkoenig / name: Jack Koenig (d371506)
• ✅ login: TaoBi22 / name: Bea Healy (d371506, 6528822)

[jackkoenig]

LGTM, are there any other operations that need similar treatment?

[fabianschuiki]

Very neat! Thanks for cleaning this up @TaoBi22 🥳. It would be amazing if we could do the same thing for ltl.delay as we've chatted about in the past -- then we could get rid of that ugly ltl.clock altogether 😏

[TaoBi22]

LGTM, are there any other operations that need similar treatment?

As @fabianschuiki alluded to, there's a plan to make the same changes to ltl.delay but I believe those are stalled right now so we don't have an explicit clocking operand for that op yet. Once we have one I'd imagine we'll want to make the same changes here.