Restored ports_arch as the source of truth for the Cortex-M ports - #590
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fdesbiens merged 1 commit intoAug 9, 2026
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The Cortex-M ports under ports/ are generated. scripts/copy_armv7_m.sh copies one tx_port.h and the per tool sources to fifteen M3, M4 and M7 targets, and scripts/copy_armv8_m.sh does the same for nine M33, M55 and M85 targets. The ports_arch_check workflow runs both scripts and fails if the tree is not reproducible, so those copies are meant never to be edited directly. They were. Every Cortex-M fix since eclipse-threadx#523 was applied to the generated copies and not to the source, so the source fell behind and the check went red: running the three scripts on dev changes 35 files. The check triggers only on pull requests targeting master, which is why nothing caught it while the fixes were merged into dev. Left alone, the next run of these scripts would have reverted three separate pieces of work: the memory barriers and clobbers from eclipse-threadx#523, the correction of the IAR assembly header to use the assembler's own comment syntax, and the move of tx_initialize_low_level.S into example_build for the M33, M55 and M85 GNU ports from eclipse-threadx#514. Bring the sources up to what the ports carry today, and regenerate. Two behavioural changes come with that, both deliberate. The barriers from eclipse-threadx#523 reach the ac5 and keil variants of M3, M4 and M7, which were outside the scope of that fix and never received it. The barrier that follows restoring the interrupt posture, which eclipse-threadx#523 gave only to the GNU ports because GNU was the only toolchain that could be tested, now applies to every tool; the identical asm statement already shipped in the AC6 and IAR ports, so this adds a pipeline flush rather than any new compiler exposure. Regenerating also drops a stray #endif at the end of the Cortex-M85 IAR tx_port.h, added by eclipse-threadx#523, which left that header with one more #endif than #if and unable to compile. Every other ARMv8-M port was balanced. Verified that the scripts are idempotent afterwards, that ports_arch_check would pass, that no port loses a barrier or a clobber, that every regenerated header is preprocessor balanced, and that every Cortex-M port covered by the two scripts now carries the entry barrier. Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>
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Makes
ports_arch/authoritative again for the Cortex-M ports, so thatports_arch_checkpasses and the copy scripts stop being a hazard.Stacked on #589. That branch removes the duplicated function body in the M4/AC6 header; this one regenerates that file among others, so #589 should merge first.
Why this is needed
The Cortex-M ports under
ports/are generated.scripts/copy_armv7_m.shcopies onetx_port.hplus the per tool sources to fifteen M3/M4/M7 targets,scripts/copy_armv8_m.shdoes the same for nine M33/M55/M85 targets, and.github/workflows/ports_arch_check.ymlruns both and fails if the tree is not reproducible. Those copies are not meant to be edited directly.They have been, consistently, since #523. On current
dev, running the three scripts changes 35 files, so the check is already red. It has not fired because it triggers on pull requests targetingmaster, while all of this work merged intodev.Left alone, the next run of those scripts would have silently reverted three separate pieces of work:
dsb/isbbarriers and"memory"clobbers;comments instead of C style, which the assembler requirestx_initialize_low_level.Sintoexample_buildfor the M33/M55/M85 GNU portsThat last one is worth dwelling on: the arch source still holds the file in
gnu/src/and lists it in the GNUCMakeLists.txt, exactly as it was before #514 moved it. Running the script would put it back and rebuild it into the library.What this does
Brings the sources up to what the ports actually carry, then regenerates. After this, the scripts are idempotent and
ports_arch_checkpasses.Two behavioural changes ride along, both deliberate:
ac5andkeilvariants of M3/M4/M7. Those targets are copy destinations but were outside Fixed race condition and message loss in Cortex-M GNU ports #523's scope, so they never received the fix. They get it now by construction.__asm__ volatile ("... isb 0xF ..." : : : "memory")statement already ships in the AC6 and IAR ports from Fixed race condition and message loss in Cortex-M GNU ports #523, so this is that same statement a second time rather than new exposure to a compiler we cannot run; the delta is a pipeline flush.A broken header fixed on the way through
ports/cortex_m85/iar/inc/tx_port.hhas ended with one more#endifthan#ifsince #523:Every other ARMv8-M port is balanced. That header cannot compile as it stands. Regenerating removes the stray directive. This is the second Cortex-M header found this week that a fix left in a non-compiling state, after the M4/AC6 one in #589 — both in files that no CI job builds.
Verification
ports_arch_checkpasses.MSR BASEPRIwrites replaced by their clobbered form, five commented out lines replaced by the real barrier, the stray#endif, and#elselines that move rather than disappear.tx_port.h.Not covered
ports/cortex_m0/{ac5,ac6,keil}/inc/tx_port.hstill lack the #523 barriers. Those are ARMv6-M, have no copy script, and are maintained by hand, so they need a separate decision rather than falling out of this one. The GNU and IAR M0 ports did get the fix.A follow-up PR will add
scripts/check_ports.sh, covering reproducibility, preprocessor balance and code at file scope, so that each of the three defects behind this change is caught mechanically in future.