Tutorials Resources

LiteX Tutorials

FPGA 101

Lessons/Labs given to students to discover FPGAs and learn Migen/LiteX through a hands-on approach. These tutorials are covering the Migen's basics (syntax/simulations) through common SoC cores: Clock generation, 7-Segments displays, etc... and then the LiteX's basics through the integration of these cores in a SoC. It demonstrates and explains how to control these cores from an Host PC through a bridge (UART) and then directly from a RISC-V Soft-CPU implemented in the FPGA.

These tutorials should help users understand the possibilities of Migen/LiteX and give the basics to create their own Migen cores/LiteX SoCs.

Note: The labs are based on the Nexys4DDR (now named NexysA7) but can be easily adapted to others boards. Since these tutorials have been written, new less expensive open-source FPGA boards, also compatible with open-source FPGA toolchains, are widely available. The tutorials will probably be adapted to support such boards in the future.

Fomu Workshop

The Fomu is a tiny FPGA board that fits in your USB port. The SoC of the FPGA is built with LiteX and the workshop provides a hands-on approach to control the peripherals from a Host PC through the USB bridge from the ValentyUSB core and then demonstrates how to create a RISC-V SoC with a VexRiscv CPU and load/execute/debug C/Rust core with it and control the peripherals of the board.

iCEBreaker LiteX examples

The iCEBreaker is the first open source iCE40 FPGA development board designed for teachers and students. The iCEBreaker target integrated in LiteX-Boards provides a minimal LiteX SoC for the iCEBreaker with a CPU, its ROM (in SPI Flash), its SRAM, close to the others LiteX targets. A more complete example of LiteX SoC for the iCEBreaker with more features, examples to run C/Rust code on the RISC-V CPU and documentation can be found in the iCEBreaker LiteX examples tutorial.

Useful resources

LiteX SoftCPU on the ULX3S

Blogpost by gojimmypi testing LiteX on the ULX3S board and experimenting with the Soft CPU.