feat(ring-4): module + use → Zig imports [SEED-4] - #12
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feat(ring-4): module + use → Zig imports [SEED-4]
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…ons exhausted (Refs #1764) (#1907) * docs: MMCM places but is dead on silicon -> open-flow structural options exhausted (Refs #1764) Tested the last structural lever: regenerate the 200 MHz clock through the MMCM/CMT tree to probe the global clock-skew hypothesis. MMCME2_BASE places in nextpnr and the fasm builds, but the flashed bitstream is dead on the AX7203 (no UART response, 4 seeds, with/without BUFG on the MMCM output) -- the open flow does not emit MMCM config bits, so it never locks. MMCM is placement-only on openXC7, not functional. So the open-toolchain structural options are exhausted (11 local fixes + MMCM); only commercial P&R can close timing or give a working MMCM. Seed-search is final on the open flow. Added ruled-out #12. Refs #1764 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> * docs: reconcile stale 'pipeline is the fix' bullet with the disproof (#10) (Refs #1764) Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> --------- Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
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Closes #7
Summary
use X::Y;statements generateconst Y = @import("Y.zig");in Zig outputuse name;statements also supportedUseDeclAST node kind for proper representationChanges
bootstrap/src/compiler.rs: AddedUseDecltoNodeKind, parseusestatements into AST nodes instead of skipping, emit@importin codegenSEED Layer Complete
All 5 seed rings (0-4) are sealed:
phi^2 + 1/phi^2 = 3 | TRINITY