feat: arbitrary-depth trainer (>2 layers), proven bit-exact + synthesizable - #1872
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…izable Removes the generator's last structural restriction (exactly 2 layers). gen_deep(sizes) + emit_verilog_deep(sizes) produce full backprop for an L-layer net of any depth (sizes=[n_in,h1,...,n_out]): hidden layers ReLU, linear output, deltas propagated back-to-front through every hidden layer; naming stays emit-compatible (x/t/y). Refactored the shared Verilog emitter into _emit_module so the 2-layer and deep paths do not duplicate; emit_verilog output unchanged; gen_deep([n_in,n_hid,n_out]) matches gen() step-for-step. Same one-smul/one-sadd datapath: depth costs microcode steps (time), not area -- [2,4,3,1] synthesizes to 17672 cells vs the 2-layer (2,4,2)'s 17468. Self-test [2,4,3,1] (3-layer) learns the nonlinear task (held-out 59/60); bit-exact gate extended with [2,4,3,1], [2,5,3,2] (deep+multi-out), and [3,4,4,2,1] (4-layer) -- all RTL == model bit-exact over 80 steps, [2,4,3,1] added to the synth gate. No structural restrictions remain. Refs #1764 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Removes the generator's last structural restriction (was exactly 2 layers).
gen_deep(sizes)+emit_verilog_deep(sizes)produce full backprop for an L-layer net of any depth (sizes=[n_in,h1,...,n_out]): hidden layers ReLU, linear output, deltas propagated back-to-front through every hidden layer.Refactored the shared emitter into
_emit_module(no duplication;emit_verilogoutput unchanged;gen_deep([n_in,n_hid,n_out])matchesgen()step-for-step). Same one-smul/one-sadd datapath: depth costs microcode steps (time), not area — [2,4,3,1] → 17672 cells vs 2-layer (2,4,2)'s 17468. Self-test [2,4,3,1] (3-layer) learns the nonlinear task (held-out 59/60); bit-exact gate extended with [2,4,3,1], [2,5,3,2] (deep+multi-out), [3,4,4,2,1] (4-layer) — all bit-exact over 80 steps + synth-checked. No structural restrictions remain. Refs #1764