v0.7.3 — multi-layer and IPC-2581

• Multi-layer boards (2–16 copper): top/in1..inN/bottom naming,
  per-layer DRC and connectivity (inner copper clears only within its
  own plane; through-vias touch every layer — blind/buried honestly
  deferred), inner Gerbers (Copper,L,Inr as .g2/.g3/…), and the
  KiCad importer now accepts multi-layer stacks (In.Cu mapped;
  copper on undeclared layers dropped with a named report entry).
• IPC-2581 revision C export: the full structure — dictionaries,
  logistics, history, BOM, stackup with real copper/dielectric
  sequence, board Step with profile/packages/components/logical nets/
  per-copper-layer features/drills with plating status. Deterministic
  (origination is a parameter, epoch default). Conformance-
  benchmarked element-for-element against kicad-cli's own IPC-2581 of
  the same real board: holes 58=58 exact, all real components
  identical, nets consistent. Ships in every fab package as
  -ipc2581.xml; MCP board_ipc2581.

382 tests. Every commit CI-verified green (one red golden briefly
reached main via a masked exit code in the push guard — fixed in the
next commit, guard pattern corrected).