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  • Instructions scheduling patent link

    @digetx digetx committed Dec 25, 2016
    d3d4ba6

  • ALU's "accumulate this" bit

    @digetx digetx committed Dec 25, 2016
    ac5e66c

  • ALU's accumulation patent link

    @digetx digetx committed Dec 25, 2016
    b24eac1

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 24, 2016
    3e05e78

  • Instructions scheduling

    @digetx digetx committed Dec 24, 2016
    3ee00cc

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 24, 2016
    1a2e530

  • ALU's CSEL completeness

    @digetx digetx committed Dec 23, 2016
    e52b6df

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 23, 2016
    6f0e183

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 22, 2016
    df3fc44

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 22, 2016
    766bc03

  • ALU bit "addition disable"

    @digetx digetx committed Dec 22, 2016
    928bbbf

  • ALU embedded constants bits

    @digetx digetx committed Dec 22, 2016
    2e4a2ef

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 22, 2016
    3bfb8f7

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 22, 2016
    f1826eb

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 22, 2016
    4dbe2e8

  • ALU "Scale result" meaning

    @digetx digetx committed Dec 22, 2016
    f585f29

  • Factor out ALU's rD bits description and fill in the missing bits

    @digetx digetx committed Dec 22, 2016
    1346d79

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 22, 2016
    15bdcbe

  • Move text from the overview to each of the blocks respectively

    @digetx digetx committed Dec 22, 2016
    e90c123

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 22, 2016
    f06266d

  • Adjust markdown headings to make it a bit easier to read

    @digetx digetx committed Dec 22, 2016
    4c12863

  • ALU accumulation

    @digetx digetx committed Dec 22, 2016
    9e50039

  • Seems only applicable to fixed10

    @digetx digetx committed Dec 20, 2016
    80083cc

  • ALU "operands" bit 4

    @digetx digetx committed Dec 20, 2016
    db7c6e3

  • Fragment instructions flow

    @digetx digetx committed Dec 20, 2016
    94052bd

  • Fix "MFU design" link

    @digetx digetx committed Dec 8, 2016
    97282e4

  • ATRAST -> MFU for consistency

    @digetx digetx committed Dec 7, 2016
    6b01681

  • well, not exactly sure, vagually remember it was in some patent... let's go with just MFU name

    @digetx digetx committed Dec 7, 2016
    f661687

  • Updated Fragment Shader ISA (markdown)

    @digetx digetx committed Dec 7, 2016
    1eeddb2

  • PSEQ and DW are also the part of the pipeline

    @digetx digetx committed Dec 7, 2016
    9318043