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Add LSM6DSV16X/LSM6DSK320X support to LSM6DXX accgyro driver#11694

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sensei-hacker merged 1 commit into
iNavFlight:release/9.1from
sensei-hacker:lsm6dsv16x-lsm6dsk320x-driver
Jul 7, 2026
Merged

Add LSM6DSV16X/LSM6DSK320X support to LSM6DXX accgyro driver#11694
sensei-hacker merged 1 commit into
iNavFlight:release/9.1from
sensei-hacker:lsm6dsv16x-lsm6dsk320x-driver

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Summary

Adds driver support for two IMU chips not previously recognized by INAV's accgyro_lsm6dxx.c: LSM6DSV16X and LSM6DSK320X. These chips reorganize CTRL1_XL/CTRL2_G to hold ODR + operating mode only (full scale moved to CTRL6_C/CTRL8_XL) with a different ODR bit encoding than the existing LSM6DSO/DSL/DS3 chips this driver already supports, so they get their own configuration sequence (lsm6dxxConfigGenV()) reached via an early-return branch in lsm6dxxConfig(), gated on WHO_AM_I. The pre-existing legacy code path is untouched.

Also wires DAKEFPVF405/target.h to the driver (USE_IMU_LSM6DXX + CS/bus/alignment, sharing the same physical pin as the board's existing gyro options per its manufacturer's public config), since that's the hardware testbed used to validate this change and its Betaflight-equivalent config lists both new chips as populated options.

Changes

  • src/main/drivers/accgyro/accgyro_lsm6dxx.c / .h: new lsm6dxxConfigGenV() config path, WHO_AM_I detection for the two new chip IDs (0x70, 0x75), new register-value constants for the Gen V register layout
  • src/main/target/DAKEFPVF405/target.h: adds USE_IMU_LSM6DXX alongside the board's existing gyro options

Testing

  • Register values cross-checked directly against the ST datasheets for both chips, and independently cross-validated against atbetaflight's hardware-validated accgyro_spi_lsm6dsv16x.c reference driver
  • Compile-tested cleanly on an existing target already using this driver (BLUEBERRYF435WING), confirming no regression to already-shipped boards
  • Hardware-validated on two physical DAKEFPVF405 units, one per new chip:
    • Correct chip detection (GYRO=LSM6DXX, ACC=LSM6DXX, status OK)
    • At-rest accelerometer magnitude ~0.99-1.0g, gyro ~0dps
    • Live dynamic response to physical handling (multi-g accel spikes, hundreds-of-dps gyro spikes) with clean settle-back to rest
    • CW90_DEG board-alignment orientation confirmed correct via physical roll and pitch tests (sign and magnitude both verified against the documented axis convention in imu.c)
  • Code-reviewed with a focus on register-level correctness given this feeds attitude estimation; two real bugs were caught and fixed before this PR (see below)

Design note: legacy chips are unaffected

Detection dispatches on an exact WHO_AM_I hardware match (a fixed silicon value, not something a legacy chip could produce), and the entire new config path is behind a single early return that's unreachable unless WHO_AM_I already matched one of the two new chip IDs. The pre-existing legacy LSM6DSO/DSL/DS3 code path is verified byte-for-byte unmodified.

Related Issues

N/A - proactively added driver support after finding these chips listed as gyro options in a target's manufacturer config with no existing INAV driver.

These chips reorganize CTRL1_XL/CTRL2_G to hold ODR + operating mode
only (full scale moved to CTRL6_C/CTRL8_XL) with a different ODR bit
encoding than the existing LSM6DSO/DSL/DS3 chips, so they get their
own config sequence (lsm6dxxConfigGenV) via an early-return branch,
leaving the legacy path untouched. Register values cross-checked
against the ST datasheets and atbetaflight's hardware-validated
accgyro_spi_lsm6dsv16x.c.

Also wires DAKEFPVF405/target.h to the driver (shares CS/bus/alignment
with the board's existing gyro options, per its manufacturer config),
since it's the hardware testbed for this change.

Hardware-validated on two physical DAKEFPVF405 units (one per chip):
detection, at-rest/dynamic accel+gyro sanity, and CW90_DEG orientation
sign all confirmed correct.
@sensei-hacker sensei-hacker added this to the 9.1 milestone Jul 7, 2026
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@sensei-hacker sensei-hacker merged commit a731ebb into iNavFlight:release/9.1 Jul 7, 2026
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