[SYCL] PR 1 - Remove FPGA attributes from SYCL FE

[premanandrao]

This removes the following attributes:

[[intel::loop_fuse]]
[[intel::loop_fuse_independent]]
[[intel::nofusion]]

[premanandrao]

#21102 requested that we split the large set of changes into manageable chunks. This is the first of many such chunks.

[premanandrao]

The clang-formatter is pointing out changes that I did not make in this PR, so ignoring that fail.
(Code reviewers, please let me know if you do want me to make those changes as part of this PR.)

[premanandrao]

Thanks @Fznamznon!

@intel/llvm-gatekeepers, this is ready for merge despite the clang-format test failure.

[premanandrao]

@intel/llvm-gatekeepers, could you please merge this PR?

The clang-format failure requires me to change things beyond what I changed (it is a group of attributes) and that will make it harder to review the actual changes made in this PR. So I don't intend to, unless you strongly prefer that I do.

[againull]

@intel/llvm-gatekeepers, could you please merge this PR?

The clang-format failure requires me to change things beyond what I changed (it is a group of attributes) and that will make it harder to review the actual changes made in this PR. So I don't intend to, unless you strongly prefer that I do.

Could you please apply clang-format. Since it will be a separate commit as only formatting change, I believe it is ok, and as far as I know we usually apply clang-format in similar situations.